METHOD FOR OPERATING DYNAMIC MEMORY
    1.
    发明公开

    公开(公告)号:US20240265962A1

    公开(公告)日:2024-08-08

    申请号:US18021177

    申请日:2022-08-12

    Abstract: A method for operating a dynamic memory is provided, and the method includes the following steps. A refresh operation is performed on the dynamic memory according to predetermined interval time T, an operation command is received in real time at the same time, a read operation is performed on a selected memory cell according to position information of the selected memory cell in the operation command when the operation command is received, and state data read in the read operation is temporarily stored in a read buffer. The interval time T is less than time t required for a voltage value of a capacitor in the memory cell to drop to a critical capacitor voltage value for the read operation to correctly read the state data of the memory cell during a write operation. According to operation command type information in the operation command, corresponding operations are performed on the selected memory cell.

    THREE-DIMENSIONAL 1S1C MEMORY BASED ON RING CAPACITOR AND PREPARATION METHOD

    公开(公告)号:US20250113505A1

    公开(公告)日:2025-04-03

    申请号:US18285857

    申请日:2023-05-06

    Abstract: The invention discloses a three-dimensional 1S1C memory based on a ring capacitor and a preparation method. The memory includes: a horizontal peripheral electrode layer including a first dielectric layer and a first metal electrode layer alternately stacked and grown on a substrate and provided with trenches penetrating in a vertical direction and holes penetrating in the vertical direction, a vertical functional layer, and a capacitive dielectric layer. An annular groove is disposed outside each hole. The annular groove surrounds the holes and vertically cuts off the peripheral electrode layer. The annular groove is evenly filled with a capacitive dielectric layer. A top of the second metal electrode layer is extended to a surface of a topmost first dielectric layer to form a bit line electrode and is connected to a bit line. A region where the second metal electrode layer faces the first metal electrode layer forms a memory cell.

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