公开(公告)号：US20040071020A1

公开(公告)日：2004-04-15

申请号：US10627917

申请日：2003-07-28

申请人： HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. a corporation of Republic of Korea

发明人： Sang-Hoan Chang ,  Ki-Seog Kim ,  Keun-Woo Lee ,  Sung-Kee Park

IPC分类号： G11C007/00

CPC分类号： G11C11/5621 ,  G11C11/5628 ,  G11C16/0425 ,  G11C2211/5611

摘要： A multi-level EEPROM cell and a method of manufacture thereof are provided so as to improve a program characteristic of the multi-level cell. For the purpose, the multi-level flash EEPROM cell includes a floating gate formed as being electrically separated from a silicon substrate by an underlying tunnel oxide layer, a first dielectric layer formed over the top of the floating gate, a first control gate formed on the floating gate as being electrically separated from the floating gate by the first dielectric layer, a second dielectric layer formed on the sidewall and top of the first control gate, a second control gate formed on the sidewall and top of the first control gate as being electrically separated from the first control gate by the second dielectric layer, and a source and drain formed in the substrate as being self-aligned with both edges of the second control gate.

摘要翻译： 提供多级EEPROM单元及其制造方法，以改善多电平单元的程序特性。 为此，多级闪速EEPROM单元包括浮置栅极，其通过下面的隧道氧化物层与硅衬底电隔离，形成在浮置栅极的顶部上的第一电介质层，形成在第一控制栅极上的第一控制栅极 所述浮置栅极通过所述第一介电层与所述浮置栅极电分离，形成在所述第一控制栅极的侧壁和顶部上的第二介电层，形成在所述第一控制栅极的侧壁和顶部上的第二控制栅极为 通过第二电介质层与第一控制栅极电分离，以及在衬底中形成的与第二控制栅极的两个边缘自对准的源极和漏极。