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    Shift register and image display apparatus using the same
    2.
    发明授权
    Shift register and image display apparatus using the same 有权
    移位寄存器和使用其的图像显示装置

    公开(公告)号：US06909417B2

    公开(公告)日：2005-06-21

    申请号：US09578440

    申请日：2000-05-25

    申请人： Hajime Washio ,  Yasushi Kubota ,  Kazuhiro Maeda ,  Yasuyoshi Kaise ,  Michael James Brownlow ,  Graham Andrew Cairns

    发明人： Hajime Washio ,  Yasushi Kubota ,  Kazuhiro Maeda ,  Yasuyoshi Kaise ,  Michael James Brownlow ,  Graham Andrew Cairns

    IPC分类号： G11C19/00 ,  G09G3/20 ,  G09G3/36

    CPC分类号： G09G3/3688 ,  G09G2300/0408 ,  G09G2310/0289 ,  G09G2330/021

    摘要： A level shifter 13 is provided for each of SR flip flops F1 constituting a shift register 11. The level shifter 13 increases a voltage of a clock signal CK. This arrangement reduces a distance for transmitting a clock signal whose voltage has been increased, as compared with a construction in which a voltage of a clock signal is increased by a single level shifter and the signal is transmitted to each of the flip flops; consequently, a load capacity of the level shifter can be smaller. Furthermore, each of the level shifters is operated during a pulse output of the previous level shifter 13, and the operation is suspended at the end of the pulse output. Thus, the level shifters 13 can operate only when it is necessary to apply a clock signal CK to the corresponding SR flip flop F1. As a result, even when an amplitude of a clock signal is small, it is possible to reduce power consumption of the shift resister under normal operation.

    摘要翻译： 为构成移位寄存器11的每个SR触发器F 1提供电平移位器13.电平移位器13增加时钟信号CK的电压。 与通过单个电平移位器增加时钟信号的电压并且将信号发送到每个触发器的结构相比，这种布置减少了用于传输电压已经增加的时钟信号的距离; 因此，电平转换器的负载能力可以更小。 此外，每个电平移位器在先前电平移位器13的脉冲输出期间操作，并且在脉冲输出结束时暂停操作。 因此，只有当需要对相应的SR触发器F 1施加时钟信号CK时，电平移位器13才能够工作。结果，即使当时钟信号的幅度小时，也可以降低功耗 的正常运行中的移位寄存器。

    Shift register and image display device
    4.
    发明授权
    Shift register and image display device 有权
    移位寄存器和图像显示设备

    公开(公告)号：US07212184B2

    公开(公告)日：2007-05-01

    申请号：US10800352

    申请日：2004-03-12

    申请人： Hajime Washio ,  Yasushi Kubota ,  Kazuhiro Maeda ,  Yasuyoshi Kaise ,  Michael James Brownlow ,  Graham Andrew Cairns

    发明人： Hajime Washio ,  Yasushi Kubota ,  Kazuhiro Maeda ,  Yasuyoshi Kaise ,  Michael James Brownlow ,  Graham Andrew Cairns

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677 ,  G09G3/3688 ,  G09G2310/0289

    摘要： In a shift register provided with flip-flops that operate in synchronism with a clock signal, and a switching means, which is opened and closed in response to an output of the preceding stage of each of the flip-flops, is installed. The clock signal is selectively inputted by the switching means, and the selected clock signal is inverted and used as a shift register output from each of the stages. Moreover, two kinds of clock signals, each of which has a duty ratio of not more than 50% and which have no overlapped portions in their low-level periods, are used so as to prevent the outputs of the shift-register from overlapping each other. Thus, it is possible to provide a shift register which is preferably used for a driving circuit of an image display device, can miniaturize the driving circuit, and can desirably change the pulse width of the output signal, and also to provide an image display device using such a shift register.

    摘要翻译： 在设置有与时钟信号同步工作的触发器的移位寄存器中，并且响应于每个触发器的前级的输出而被打开和关闭的开关装置被安装。 时钟信号由切换装置选择性地输入，所选择的时钟信号被反相并用作从每个级输出的移位寄存器。 此外，使用两种时钟信号，每个时钟信号的占空比不大于50％，并且在其低电平时段中没有重叠部分，以便防止移位寄存器的输出与每个 其他。 因此，可以提供优选用于图像显示装置的驱动电路的移位寄存器，可以使驱动电路小型化，并且可以期望地改变输出信号的脉冲宽度，并且还提供图像显示装置 使用这种移位寄存器。

    Precharge circuit and image display device using the same
    6.
    发明授权
    Precharge circuit and image display device using the same 有权
    预充电电路和使用其的图像显示装置

    公开(公告)号：US06836269B2

    公开(公告)日：2004-12-28

    申请号：US09795658

    申请日：2001-02-28

    申请人： Kazuhiro Maeda ,  Hajime Washio ,  Yasushi Kubota ,  Yasuyoshi Kaise ,  Michael James Brownlow ,  Graham Andrew Cairns

    发明人： Kazuhiro Maeda ,  Hajime Washio ,  Yasushi Kubota ,  Yasuyoshi Kaise ,  Michael James Brownlow ,  Graham Andrew Cairns

    IPC分类号： G09G500

    CPC分类号： G09G3/3688 ,  G09G2310/0248 ,  G09G2310/0289 ,  G09G2330/021

    摘要： A precharge control circuit constituted by (1) a latch circuit mounted in a precharge circuit and (2) a level shifter circuit of a current drive type controlled through an output of the latch circuit is included. The precharge control circuit changes the latch circuit to an active state to cause the level shifter circuit of a current drive type to operate only during a precharge period and also during immediately preceding and succeeding periods, and outside these periods, changes the latch circuit in a non-active state and the level shifter circuit of a current drive type in an operating state to save power consumption in the level shifter circuit. This enables a low-power-consuming precharge circuit, as well as a low-power-consuming image display device with a high quality display capability, to be offered.

    摘要翻译： 一种预充电控制电路，包括：（1）安装在预充电电路中的锁存电路和（2）通过锁存电路的输出控制的电流驱动型电平移位电路。 预充电控制电路将锁存电路改变为有效状态，使得电流驱动类型的电平移动电路仅在预充电期间以及在紧接之前和之后周期期间操作，并且在这些周期之外，将锁存电路改变为 非活动状态和电流驱动类型的电平移位器电路，以在电平移位器电路中节省功耗。 这使得能够提供低功耗预充电电路以及具有高质量显示能力的低功耗图像显示装置。

    Signal line driving circuit and image display device
    7.
    发明授权
    Signal line driving circuit and image display device 有权
    信号线驱动电路和图像显示装置

    公开(公告)号：US07042433B1

    公开(公告)日：2006-05-09

    申请号：US09567364

    申请日：2000-05-09

    申请人： Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Graham Andrew Cairns ,  Michael James Brownlow

    发明人： Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Graham Andrew Cairns ,  Michael James Brownlow

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677 ,  G09G2310/0289

    摘要： A signal line driving circuit includes a shift register having a plurality of shift circuits, each of which shifts a start pulse successively to the next stage, synchronizing with the timing of a clock signal. In this signal line driving circuit, shift pulses are outputted from an AND gate based on output pulses of two adjacent shift circuits. Meanwhile, a width specifying pulse for specifying a pulse width of the shift pulse is inputted via a transistor whose ON/OFF operation is controlled by the shift pulse. A logical operation circuit operates an AND of the shift pulse and the width specifying pulse and outputs the result of operation to a signal line. When the shift pulse is non-active, the transistor becomes OFF, which causes the signal line transmitting the width specifying pulse to be disconnected from the signal line driving circuit, thereby reducing a capacitive load of wiring. As a result, reduction of a parasitic capacitance of the wiring, reduction in the number of elements, reduction in the size of an amplitude of an input signal, etc. in the signal line driving circuit are attained.

    摘要翻译： 信号线驱动电路包括具有多个移位电路的移位寄存器，每个移位电路将开始脉冲连续地移位到下一级，与时钟信号的定时同步。 在该信号线驱动电路中，基于两个相邻移位电路的输出脉冲，从与门输出移位脉冲。 同时，用于指定移位脉冲的脉冲宽度的宽度指定脉冲通过由移位脉冲控制其ON / OFF操作的晶体管输入。 逻辑运算电路对移位脉冲和宽度指定脉冲进行AND运算，并将运算结果输出到信号线。 当移位脉冲不起作用时，晶体管变为截止，使得将信号线发送宽度指定脉冲与信号线驱动电路断开，从而降低布线的容性负载。 结果，实现了信号线驱动电路中布线的寄生电容的减小，元件数目的减少，输入信号的幅度的减小等。

    Two-way shift register and image display device using the same
    8.
    发明授权
    Two-way shift register and image display device using the same 失效
    双向移位寄存器和图像显示装置使用相同

    公开(公告)号：US07365727B2

    公开(公告)日：2008-04-29

    申请号：US10788161

    申请日：2004-02-25

    申请人： Masakazu Satoh ,  Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Michael James Brownlow ,  Graham Andrew Cairns

    发明人： Masakazu Satoh ,  Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Michael James Brownlow ,  Graham Andrew Cairns

    IPC分类号： G09G3/36

    CPC分类号： G11C19/00 ,  G09G3/3674 ,  G09G3/3685 ,  G09G2310/0283 ,  G09G2310/0289 ,  G09G2330/021 ,  G11C19/28

    摘要： A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease. Consequently, there can be provided a shift register that is capable of shifting in two directions, that can normally operate even with an input signal having a small amplitude, and that therefore consumes less electric power.

    摘要翻译： 移位寄存器具有移位寄存器部分，该移位寄存器部分由与时钟信号同步操作的多级触发器组成;以及电平移位器，用于升压低于驱动电压的启动信号，并将其施加到两端 的移位寄存器，并且移位寄存器能够根据切换信号切换移位方向。 上述电平移位器是电流驱动型电平移位器，即使在晶体管特性较差的情况下或者在快速操作的情况下也能够工作，并且即使利用具有小振幅的启动信号也能进行电平移位。 此外，上述电平移位器分别设置在移位寄存器部分的两端，并且其中一个电平移位器根据切换信号停止工作，从而消耗的功率应该减小。 因此，可以提供能够在两个方向上移位的移位寄存器，即使在具有小幅度的输入信号的情况下也能正常地进行操作，因此消耗较少的电力。

    Matrix type image display device
    10.
    发明授权
    Matrix type image display device 有权
    矩阵式图像显示装置

    公开(公告)号：US06559824B1

    公开(公告)日：2003-05-06

    申请号：US09666376

    申请日：2000-09-20

    申请人： Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Graham Andrew Cairns ,  Michael James Brownlow

    发明人： Yasushi Kubota ,  Hajime Washio ,  Kazuhiro Maeda ,  Graham Andrew Cairns ,  Michael James Brownlow

    IPC分类号： G09G336

    CPC分类号： G09G3/3688 ,  G09G3/20 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0232 ,  G09G2310/0248 ,  G09G2310/0289 ,  G09G2330/021

    摘要： A matrix type image display device has a structure in which the internal states of all of shift registers (the outputs of flip-flops included in the shift registers) in a scanning signal line drive circuit and data signal line drive circuit are made inactive by the use of an initializing signal generated by a NAND gate based on a combination of signals, which do not affect a displayed image, from a control circuit. With this structure, since the shift registers are initialized when power is supplied, it is possible to prevent an indefinite state when power is supplied. Therefore, by selectively inputting signals (such as clock signals) for controlling the shift registers, it is possible to prevent an excessive increase in the signal line load. Consequently, the operation of the image display device can be stabilized. Moreover, it is not necessary to improve the drive ability of an external IC incorporating the control circuit and the supply ability of a power supply circuit, thereby achieving a reduction in the cost and power consumption of the external IC.

    摘要翻译： 矩阵型图像显示装置具有这样的结构，其中扫描信号线驱动电路和数据信号线驱动电路中的所有移位寄存器（包括在移位寄存器中的触发器的输出）的内部状态由 基于不影响显示图像的信号的组合，从NAND门产生的初始化信号从控制电路使用。 利用这种结构，由于在供电时初始化了移位寄存器，所以可以在供电时防止不确定的状态。 因此，通过选择性地输入用于控制移位寄存器的信号（例如时钟信号），可以防止信号线负载的过度增加。 因此，能够使图像显示装置的动作稳定。 此外，不需要提高包含控制电路的外部IC的驱动能力和电源电路的供给能力，从而实现了外部IC的成本和功耗的降低。