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公开(公告)号：US07116174B2
公开(公告)日：2006-10-03
申请号：US10953897
申请日：2004-09-29
申请人： Hao Fang , Cameron Carroll Rabe
发明人： Hao Fang , Cameron Carroll Rabe
CPC分类号： H03F1/302 , H03F2200/453
摘要： A method and apparatus for compensating a base current of a bipolar junction transistor by replicating operating conditions of the BJT in a compensating circuit. An output current of the compensating circuit is fractionally related to the base current and thus can be supplied to an operational circuit comprising the BJT to compensate the base current. In a preferred embodiment, the BJT is operated between BVCEO and BVCBO and the base current to be compensated flows from the BJT.
摘要翻译： 一种用于通过在补偿电路中复制BJT的工作条件来补偿双极结型晶体管的基极电流的方法和装置。 补偿电路的输出电流与基极电流分数有关，因此可以提供给包括BJT的运算电路以补偿基极电流。 在优选实施例中，BJT在BVCEO和BVCBO之间运行，待补偿的基极电流从BJT流出。
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公开(公告)号：US07425867B2
公开(公告)日：2008-09-16
申请号：US11241874
申请日：2005-09-30
IPC分类号： H03F3/45
CPC分类号： G05F3/262 , H03F3/4521
摘要： A differential input/differential output converter circuit. The circuit comprises differential complementary input modules each comprising cross-coupled devices for biasing current mirror masters to a condition that increases the operating speed in response to a transition in the differential input signals. Certain current mirror masters are biased to a strong threshold condition and other current mirror masters are biased to a weak threshold condition responsive to a state of the differential input signals. According to another embodiment, the converter circuit further comprises a boost circuit capacitively coupled to the converter circuit for providing further speed improvements.
摘要翻译： 差分输入/差分输出转换器电路。 电路包括差分互补输入模块，每个差分互补输入模块包括用于将电流镜主机偏置到响应于差分输入信号中的转变而增加操作速度的条件的交叉耦合器件。 某些电流镜主器件被偏置到强阈值条件，并且响应于差分输入信号的状态而使其他电流镜主器件偏置到弱阈值条件。 根据另一个实施例，转换器电路还包括电容耦合到转换器电路的升压电路，用于提供进一步的速度改进。
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3.发明授权Method and apparatus for protecting magnetoresistive heads from electrostatic discharge 有权用于保护磁阻头免受静电放电的方法和装置公开(公告)号：US07502207B2
公开(公告)日：2009-03-10
申请号：US11099214
申请日：2005-04-05
CPC分类号： G11B5/40
摘要： An apparatus and method for providing electrostatic discharge protection for a disc drive read head. A pair of depletion mode MOSFETS, and a fuse associated with each are disposed between the read head output terminals. The MOSFETS are controlled to an “off” state for testing the preamplifier prior to assembly of the read head. After assembly of the head, a second pair of MOSFETS is gated to an “on” state to open the fuses and thus permit normal operation of the read head.
摘要翻译： 一种用于为盘驱动读头提供静电放电保护的装置和方法。 一对耗尽型MOSFETS和与之相关联的熔丝设置在读出头输出端子之间。 在组装读取头之前，将MOSFETS控制为“关闭”状态以测试前置放大器。 在头部组装之后，第二对MOSFETS被选通到“导通”状态以打开保险丝，从而允许读取头的正常操作。
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4.发明授权Apparatus and method for controlling common mode voltage of a disk drive write head 有权用于控制磁盘驱动器写头的共模电压的装置和方法公开(公告)号：US07701654B2
公开(公告)日：2010-04-20
申请号：US11521568
申请日：2006-09-14
IPC分类号： G11B5/09
CPC分类号： G11B5/09 , H03F3/45475 , H03F3/45928 , H03F2203/45212 , H03F2203/45626 , H03F2203/45681
摘要： An apparatus and method for controlling the common mode voltage across a data storage device write head. The write current is supplied by a first plurality of parallel current sources each independently activated to limit the common mode voltage generated across the write head. A plurality of parallel resistive elements responsive to current supplied by a second plurality of parallel current sources bias an output transistor that further controls the write current. Each of the plurality of parallel resistive elements and each of the second plurality of parallel current sources is also independently activated to limiting the common mode voltage generated across the write head.
摘要翻译： 一种用于控制跨数据存储设备写头的共模电压的装置和方法。 写入电流由第一多个并联电流源提供，每个并行电流源各自独立地被激活以限制在写入头上产生的共模电压。 响应于由第二多个并联电流源提供的电流的多个并联电阻元件偏置进一步控制写入电流的输出晶体管。 多个并联电阻元件和第二多个并联电流源中的每一个也被独立地激活以限制在写入头上产生的共模电压。
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