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公开(公告)号:US20240291438A1
公开(公告)日:2024-08-29
申请号:US18658837
申请日:2024-05-08
发明人: Seiji TAKEUCHI
CPC分类号: H03F1/30 , G03B13/36 , G05F3/24 , H02P25/034 , H03F3/45 , H03F2200/453 , H03M1/1009
摘要: Driver circuits, systems for driving actuators, and imaging systems with actuators. The driver circuit includes a current comparator circuit, a driver, and a replica circuit. The current comparator circuit includes a first node having a first voltage. The current comparator circuit also includes a second node having a second voltage. The driver includes a first terminal responsive to the second voltage. The driver also includes a second terminal connected to a reference voltage. The replica circuit includes a third terminal connected to the first node. The replica circuit also includes a fourth terminal connected to the second terminal of the driver. The replica circuit also includes a fifth terminal connected to the first terminal of the driver.
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公开(公告)号:US20230387865A1
公开(公告)日:2023-11-30
申请号:US18450123
申请日:2023-08-15
发明人: Seiji TAKEUCHI
IPC分类号: H03F1/30 , G03B13/36 , G05F3/24 , H03F3/45 , H02P25/034
CPC分类号: H03F1/30 , G03B13/36 , G05F3/24 , H03F3/45 , H02P25/034 , H03F2200/453 , H03M1/1009
摘要: Driver circuits, systems for driving actuators, and imaging systems with actuators. The driver circuit includes a current comparator circuit, a driver, and a replica circuit. The current comparator circuit includes a first node having a first voltage. The current comparator circuit also includes a second node having a second voltage. The driver includes a first terminal responsive to the second voltage. The driver also includes a second terminal connected to a reference voltage. The replica circuit includes a third terminal connected to the first node. The replica circuit also includes a fourth terminal connected to the second terminal of the driver. The replica circuit also includes a fifth terminal connected to the first terminal of the driver.
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3.
公开(公告)号:US20230163729A1
公开(公告)日:2023-05-25
申请号:US18158791
申请日:2023-01-24
发明人: Stefan BARABAS , Joseph BALARDETA , Simon PANG , Scott DENTON
CPC分类号: H03F1/30 , H03F1/086 , H03F1/301 , H03F3/082 , H03F3/087 , H03G3/3084 , H01L31/02016 , H01L31/09 , H03F1/56 , H03F3/08 , H03F2200/129 , H03F2200/156 , H03F2200/453 , H03F2200/132
摘要: The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.
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4.
公开(公告)号:US20230143127A1
公开(公告)日:2023-05-11
申请号:US17453967
申请日:2021-11-08
发明人: Todd Morgan RASMUS , Shih-Wei CHOU
CPC分类号: H03F3/45183 , H03F1/0227 , H03F2200/453 , H03F2200/456 , H03F2200/555 , H03F2200/91 , H03F2203/45008
摘要: Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.
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公开(公告)号:US20180367103A1
公开(公告)日:2018-12-20
申请号:US16110801
申请日:2018-08-23
申请人: Socionext Inc.
发明人: Masahiro KUDO
CPC分类号: H03F1/30 , H03F3/45183 , H03F3/45766 , H03F3/45771 , H03F2200/447 , H03F2200/453 , H03F2203/45208 , H03F2203/45624 , H03F2203/45726 , H03G1/0029 , H03G1/0088 , H03G3/001 , H03G3/30 , H03K5/24
摘要: An amplifier circuit includes: an input circuit configured to receive an input signal; a load circuit provided in series with the input circuit and including a first variable resistance unit and a second variable resistance unit, a resistance value of the first variable resistance unit being controlled by, a digital code, a resistance value of the second variable resistance unit being controlled by an analog control voltage; and a correction circuit including a third variable resistance unit having a circuit configuration corresponding to the first variable resistance unit and a fourth variable resistance unit having a circuit configuration corresponding to the second resistance unit, a resistance value of the third variable resistance unit being controlled by the digital code, a resistance value of the fourth variable resistance unit being controlled by the analog control voltage, the correction circuit being configured correct a resistance value of the load circuit.
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公开(公告)号:US20180294784A1
公开(公告)日:2018-10-11
申请号:US15668097
申请日:2017-08-03
申请人: SK hynix Inc.
发明人: Dong Hyun KIM , Eun Ji CHOI , Yo Han JEONG , Soon Ku KANG , Woo Jin KANG , Kwan Su SHON , Hyun Bae LEE , Tae Jin HWANG
CPC分类号: H03F3/45076 , G05F1/565 , H03F3/45183 , H03F3/45488 , H03F3/4565 , H03F3/45748 , H03F2200/453 , H03F2203/45008 , H03F2203/45418 , H03M1/00
摘要: An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.
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公开(公告)号:US10020782B2
公开(公告)日:2018-07-10
申请号:US15286616
申请日:2016-10-06
申请人: DSP Group LTD.
发明人: Avi Cohen , Ron Pongratz
CPC分类号: H03F1/301 , H03F1/0216 , H03F1/223 , H03F3/193 , H03F3/245 , H03F3/345 , H03F2200/451 , H03F2200/453
摘要: A biasing device for direct current (DC) biasing a linear power amplifier that comprises multiple linear power amplifier circuits that are ideally identical to each other; wherein the biasing device may include a replica circuit that is a replica of a linear power amplifier circuit of the multiple linear power amplifier circuits; and a bias control circuit; wherein the bias control circuit is configured to feed the replica circuit with one or more DC biasing signals thereby maintaining at a constant value a replica DC current that is consumed by the replica circuit, and maintaining at a fixed value a replica DC voltage of a replica output node of the replica circuit; and wherein the replica circuit is coupled the multiple linear power amplifier circuits and is configured to supply DC voltage bias signals that force each linear power amplifier circuit of the multiple linear power amplifier circuits to consume a linear power amplifier circuit DC current that equals the replica DC current, when the linear power amplifier circuit is fed with a linear power amplifier DC voltage that either equals the replica DC voltage or differs from the replica DC voltage by a fraction of the replica DC voltage.
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公开(公告)号:US09898028B2
公开(公告)日:2018-02-20
申请号:US14755435
申请日:2015-06-30
发明人: Masoud Roham , Liang Dai
CPC分类号: G05F3/262 , G01R19/0092 , H03F3/347 , H03F3/505 , H03F2200/453 , H03F2200/456 , H03F2200/474 , H03F2200/91
摘要: Certain aspects of the present disclosure generally relate to a low voltage, accurate current mirror, which may be used for distributed sensing of a remote current in an integrated circuit (IC). One example current mirror typically includes a first pair of transistors, a second pair of transistors in cascode with the first pair of transistors, a switching network coupled to the second pair of transistors, and a third pair of transistors coupled to the switching network. An input node between the first and second pairs of transistors may be configured to receive an input current for the current mirror, and an output node at the first pair of transistors may be configured to sink an output current for the current mirror, proportional to the input current. This current mirror architecture offers a hybrid low-voltage/high-voltage solution, tolerates low input voltages, provides high output impedance, and offers low area and power consumption.
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公开(公告)号:US20170331366A1
公开(公告)日:2017-11-16
申请号:US15335956
申请日:2016-10-27
申请人: MediaTek Inc.
发明人: Ramy Awad
IPC分类号: H02M3/07
CPC分类号: H02M3/07 , H03F3/005 , H03F3/301 , H03F3/3069 , H03F3/505 , H03F2200/219 , H03F2200/231 , H03F2200/252 , H03F2200/27 , H03F2200/297 , H03F2200/312 , H03F2200/396 , H03F2200/414 , H03F2200/417 , H03F2200/42 , H03F2200/453 , H03F2200/456 , H03F2200/513 , H03F2200/69
摘要: A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.
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公开(公告)号:US09794001B2
公开(公告)日:2017-10-17
申请号:US14990723
申请日:2016-01-07
申请人: Fujitsu Limited
发明人: Jian Hong Jiang
CPC分类号: H04B10/616 , H03F3/082 , H03F3/45475 , H03F3/45645 , H03F3/45753 , H03F2200/453 , H03F2203/45288
摘要: A method and system for amplifying small optical currents in an optical receiver front end system may employ multiple transimpendance amplifiers (TIAs) and feedback control loops. For example, the front end system may include a main feedback control loop (having a main TIA) and a replica feedback control loop (having a replica TIA) that, collectively, generate an optimum input common mode level for a differential amplifier operating at high data rates (e.g., speeds up to tens of gigabits per second). The replica TIA may track the noise from the power supply of the optical receiver in the substantially same manner as the main TIA. Therefore, the differential signals produced by the main control loop may not be degraded at the input to the high-speed differential amplifier. The outputs of the high-speed differential amplifier may be symmetric about the common mode level and may be suitable inputs for voltage sampling.
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