-
公开(公告)号:US20240363824A1
公开(公告)日:2024-10-31
申请号:US18766707
申请日:2024-07-09
发明人: Ningyu LUO , Zouming XU , Xintao WU , Jiawei XU , Jie WANG , Tingwei HAN , Wenzhuo TANG
IPC分类号: H01L33/62 , H01L25/075 , H01L25/16 , H01L27/12
CPC分类号: H01L33/62 , H01L25/0753 , H01L25/167 , H01L27/124
摘要: An array substrate includes a base substrate, a conductive layer on a side of the base substrate, a light adjustment layer on a side of the conductive layer away from the base substrate, a plurality of signal lines on a side of the base substrate away from the conductive layer, and a protective layer between the light adjustment layer and the base substrate. The conductive layer includes a plurality of pads electrically connected with electronic elements. An orthographic projection of at least part of the light adjustment layer on the base substrate does not overlap an orthographic projection of the conductive layer on the base substrate, and is located in gaps between orthographic projections of adjacent signal lines on the base substrate. An orthographic projection of the protective layer on the base substrate at least covers the orthographic projection of the at least part on the base substrate.
-
公开(公告)号:US20240295774A1
公开(公告)日:2024-09-05
申请号:US18638711
申请日:2024-04-18
发明人: Jie WANG , Xintao WU , Wenzhuo TANG , Zouming XU
IPC分类号: G02F1/1335 , G02F1/13357
CPC分类号: G02F1/133612 , G02F1/133603
摘要: A light-emitting substrate having a functional area and a bonding area spaced apart in a first direction; the light-emitting substrate includes: a substrate, a plurality of driver chips located on the substrate and located in the functional area, and a plurality of conductive patterns located between the substrate and the plurality of driver chips. The plurality of driver chips include a plurality of first driver chips and a plurality of second driver chips; among the plurality of first driver chips, at least one first driver chip is located on at least one side of the plurality of second driver chips in the first direction. The first driver chip includes at least one dummy pin. A conductive pattern is electrically connected to a dummy pin.
-