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1.发明授权公开(公告)号：US08159013B2
公开(公告)日：2012-04-17
申请号：US12524998
申请日：2009-02-24
IPC分类号： H01L29/66 , H01L29/94 , H01L21/108
CPC分类号： H01L27/0207 , H01L23/522 , H01L23/5286 , H01L27/11807 , H01L2924/0002 , H01L2924/00
摘要： There is provided a layout structure of a semiconductor integrated circuit capable of preventing the thinning of a metal wiring line close to a cell boundary and wire breakage therein without involving increases in the amount of data for OPC correction and OPC process time. In a region interposed between a power supply line and a ground line each placed to extend in a first direction, first and second cells each having a transistor and an intra-cell line each for implementing a circuit function are placed to be adjacent to each other in the first direction. In a boundary portion between the first and second cells, a metal wiring line extending in a second direction orthogonal to the first direction is placed so as not to short-circuit the power supply line and the ground line.
摘要翻译： 提供了一种半导体集成电路的布局结构，其能够防止金属布线在细胞边界附近的细化和线断裂，而不涉及用于OPC校正和OPC处理时间的数据量的增加。 在放置在第一方向上延伸的电源线和接地线之间的区域中，分别具有用于实现电路功能的晶体管和单元间线路的第一和第二单元彼此相邻 在第一个方向。 在第一和第二单元之间的边界部分中，放置沿与第一方向正交的第二方向延伸的金属布线，以便不使电源线和接地线短路。
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公开(公告)号：US20100187699A1
公开(公告)日：2010-07-29
申请号：US12524998
申请日：2009-02-24
IPC分类号： H01L23/49
CPC分类号： H01L27/0207 , H01L23/522 , H01L23/5286 , H01L27/11807 , H01L2924/0002 , H01L2924/00
摘要： There is provided a layout structure of a semiconductor integrated circuit capable of preventing the thinning of a metal wiring line close to a cell boundary and wire breakage therein without involving increases in the amount of data for OPC correction and OPC process time. In a region interposed between a power supply line and a ground line each placed to extend in a first direction, first and second cells each having a transistor and an intra-cell line each for implementing a circuit function are placed to be adjacent to each other in the first direction. In a boundary portion between the first and second cells, a metal wiring line extending in a second direction orthogonal to the first direction is placed so as not to short-circuit the power supply line and the ground line.
摘要翻译： 提供了一种半导体集成电路的布局结构，其能够防止金属布线在细胞边界附近的细化和线断裂，而不涉及用于OPC校正和OPC处理时间的数据量的增加。 在放置在第一方向上延伸的电源线和接地线之间的区域中，分别具有用于实现电路功能的晶体管和单元间线路的第一和第二单元彼此相邻 在第一个方向。 在第一和第二单元之间的边界部分中，放置沿与第一方向正交的第二方向延伸的金属布线，以便不使电源线和接地线短路。
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