公开(公告)号：US4977842A

公开(公告)日：1990-12-18

申请号：US357263

申请日：1989-05-26

申请人： Hiroaki Fukao ,  Teruhiko Ohkita ,  Nobusuke Nagasaka ,  Yukio Ichihara ,  Toshio Sasaki

发明人： Hiroaki Fukao ,  Teruhiko Ohkita ,  Nobusuke Nagasaka ,  Yukio Ichihara ,  Toshio Sasaki

IPC分类号： D05B57/06 ,  D05B87/02

CPC分类号： D05B57/06 ,  D05B87/02

摘要： This invention provides an overlock sewing machine with a threading mechanism that is both easier and more efficient to use. As shown in FIGS. 1 and 7, the overlock sewing machine has a vertically movable needle (6, 106), a looper carriage (18, 118) connected to a rotating shaft, and a looper (11, 111) on the end of the looper carriage. The looper extends laterally over the looper carriage and has a thread-receiving eye (11a, 111a). The looper and the needle cooperate to form a chain stitch. As shown in FIGS. 3 and 9, a thread-guiding member (25, 125) next to the looper pivots with the looper to guide a thread LT through the thread-receiving eye. A movable lever (30, 130) pivots with or relative to the looper. A thread-delivering member (39, 139) mounted on the movable lever that can be set in two positions: a first position corresponding to a first position of the thread-receiving eye, and a second position corresponding to the thread-guiding member. In the second position, the thread passes through the thread-guiding member.

摘要翻译： 本发明提供了一种具有更容易和更有效使用的穿线机构的包缝机。 如图 如图1和图7所示，包缝机具有可垂直移动的针（6,106），连接到旋转轴的打环架（18,118）和在活套架托架的端部上的弯针（11,111）。 该弯针横向延伸穿过活套架托架并具有一个接线眼（11a，111a）。 活针和针合作形成链式针迹。 如图 如图3和图9所示，在弯针旁边的导丝构件（25,125）用弯针枢转以引导线LT穿过线接收眼。 活动杆（30,130）与弯针枢转或相对于弯针枢转。 安装在可动杆上的螺纹输送部件（39,139），该螺纹输送部件能够设置在与螺纹接收眼的第一位置对应的第一位置和与引导部件对应的第二位置的两个位置。 在第二位置，线穿过线引导构件。

公开(公告)号：US06518846B2

公开(公告)日：2003-02-11

申请号：US09755120

申请日：2001-01-08

申请人： Yukio Ichihara

发明人： Yukio Ichihara

IPC分类号： H03L700

CPC分类号： H03K3/011 ,  H03B5/04 ,  H03K3/0315 ,  H03L1/00 ,  H03L7/0995

摘要： In a voltage controlled oscillator (VCO) having a voltage-current conversion circuit, a ring oscillator, and a main power supply for feeding a power supply voltage to these components, it is constructed so that a voltage which is fed to the voltage-current conversion circuit and ring oscillator may be applied with an internal voltage via a regulator circuit, thus effecting an oscillation output having only slight variations to the variations of the power supply voltage. Therefore, a phase synchronous circuit such as PLL circuits may be maintained at a locked status. In some instances, such a VCO may be modified not only to stabilize the dynamic range to the VCO control voltage, but also to switch the dynamic range. Thus, the oscillation frequency oscillated and outputted by the ring oscillator may be stabilized even upon the occurrences of the variations of the power supply voltage Vcc which is fed at a locked status.

摘要翻译： 在具有电压 - 电流转换电路的压控振荡器（VCO），环形振荡器和用于将电源电压馈送到这些部件的主电源中，构造成被馈送到电压 - 电流 转换电路和环形振荡器可以经由调节器电路施加内部电压，从而实现对电源电压的变化具有轻微变化的振荡输出。 因此，可以将诸如PLL电路的相位同步电路保持在锁定状态。 在一些情况下，可以修改这样的VCO不仅可以将动态范围稳定到VCO控制电压，而且可以改变动态范围。 因此，即使出现在锁定状态下供电的电源电压Vcc的变化，环形振荡器振荡和输出的振荡频率也可能被稳定。

公开(公告)号：US06466270B1

公开(公告)日：2002-10-15

申请号：US09347269

申请日：1999-07-06

申请人： Yukio Ichihara

发明人： Yukio Ichihara

IPC分类号： H04N5073

CPC分类号： H03L7/0891 ,  H03L7/093 ,  H03L7/18 ,  H04N5/126 ,  H04N5/44504 ,  H04N21/4305

摘要： The phase locked loop circuit according to the present invention is configured such that the CPU changes the time constant of the variable LPF filter to an optimum value in accordance with the state of the external signal fed from outside, for example by way of a selection switch activated in accordance with a control signal fed from the CPU, the responsive rate of the PLL circuit is raised, so that it can cope with jittery movements generated due to noise or a fluctuation of the supply voltage of the PLL circuit itself. On the other hand, in a case in which an external signal fed from outside the PLL circuit includes a considerable amount of noise or signal loss in itself, or suffers a signal loss, the CPU switches the time constant of the variable low-pass filter in accordance with the state of the external signal, and thereby sets the responsive rate of the PLL circuit to an optimum level, so that a fluctuation of the PLL circuit itself is suppressed, and the jittery movements of the OSD characters can thereby be eliminated.

摘要翻译： 根据本发明的锁相环电路被配置为使得CPU根据从外部馈送的外部信号的状态将可变LPF滤波器的时间常数改变为最佳值，例如通过选择开关 根据从CPU馈送的控制信号激活，PLL电路的响应速率提高，从而可以应对由于噪声或PLL电路本身的电源电压的波动而产生的抖动。 另一方面，在从PLL电路外部馈送的外部信号本身包含相当大量的噪声或信号损耗或者信号丢失的情况下，CPU切换可变低通滤波器的时间常数 根据外部信号的状态，从而将PLL电路的响应速率设定为最佳电平，从而抑制PLL电路本身的波动，从而可以消除OSD字符的抖动运动。