公开(公告)号：US20090304078A1

公开(公告)日：2009-12-10

申请号：US12473950

申请日：2009-05-28

申请人： Takafumi YUASA ,  Hiroaki NAKATA ,  Fumitaka IZUHARA ,  Kazushi AKIE ,  Motoki KIMURA

发明人： Takafumi YUASA ,  Hiroaki NAKATA ,  Fumitaka IZUHARA ,  Kazushi AKIE ,  Motoki KIMURA

IPC分类号： H04N7/26

CPC分类号： H03M7/40 ,  H04N19/13 ,  H04N19/436 ,  H04N19/44 ,  H04N19/46 ,  H04N19/61

摘要： The variable length decoder has a memory device including a plurality of lookup tables, and sequentially decodes codewords of variable-length codes using the memory device. The decoded values corresponding to the codewords and control information pieces are stored in the lookup tables. In decoding one codeword, one lookup table is selected from among the plurality of lookup tables. In the decode, one decoded value corresponding to the one codeword, and a control information piece for selecting a next lookup table depending on the decoded value and used for a next decode are produced from the selected lookup table in response to the one codeword in parallel.

摘要翻译： 可变长度解码器具有包括多个查找表的存储器件，并且使用该存储器件对可变长度代码的码字进行顺序解码。 对应于码字和控制信息的解码值存储在查找表中。 在解码一个码字时，从多个查找表中选择一个查找表。 在解码中，对应于一个码字的一个解码值和用于根据解码值选择下一个查找表并用于下一个解码的控制信息片段从响应于并行的一个码字的所选查询表产生 。

公开(公告)号：US20090237278A1

公开(公告)日：2009-09-24

申请号：US12467556

申请日：2009-05-18

申请人： Hiroaki NAKATA ,  Fumitaka IZUHARA ,  Kazushi AKIE ,  Takafumi YUASA

发明人： Hiroaki NAKATA ,  Fumitaka IZUHARA ,  Kazushi AKIE ,  Takafumi YUASA

IPC分类号： H03M7/40

CPC分类号： H03M7/425 ,  H03M7/30 ,  H03M7/40 ,  H03M7/46 ,  H04N19/115 ,  H04N19/12 ,  H04N19/176 ,  H04N19/61

摘要： A variable length code decoding device for decoding variable length code data, including: a table memory that stores a plurality of decoding process tables having a reference relationship therein; and a decoding control unit that is given a start address and an initial reference bit length of the table memory; and sequentially selects the decoding process tables according to the decoded data to control a process of decoding the variable length code data, wherein when referring to the decoding process table to perform an initial decoding of the variable length code data, the initial decoding process is conducted by a longer bit length to be clipped from the variable length code data for referring to the decoding process table than the bit length used when referring to the other portions of the decoding process table.

摘要翻译： 一种用于解码可变长度码数据的可变长度码解码装置，包括：存储多个具有参考关系的解码处理表的表存储器; 以及解码控制单元，其被给予所述表存储器的起始地址和初始参考位长度; 并根据解码数据依次选择解码处理表，以控制对可变长度代码数据进行解码的处理，其中当参考解码处理表执行可变长度代码数据的初始解码时，进行初始解码处理 通过比参考解码处理表的其他部分使用的比特长度从参考解码处理表的可变长度代码数据中减去更长的比特长度。

公开(公告)号：US20090144527A1

公开(公告)日：2009-06-04

申请号：US12324951

申请日：2008-11-28

申请人： Hiroaki NAKATA ,  Takafumi YUASA ,  Fumitaka IZUHARA ,  Kazushi AKIE ,  Motoki KIMURA

发明人： Hiroaki NAKATA ,  Takafumi YUASA ,  Fumitaka IZUHARA ,  Kazushi AKIE ,  Motoki KIMURA

IPC分类号： G06F9/44

CPC分类号： H04L49/901 ,  H04L49/90

摘要： The present invention provides a stream processing apparatus capable of improving the processing performance in the case of continuously processing a plurality of data streams. A control stream, different from a data stream, is prepared, and a program and a parameter are updated in advance in accordance with the control stream. Double buffer areas are prepared in a memory of the stream processing apparatus into which the program and the parameter are stored. The location of the data stream to be input is written in the control stream, and buffers for reading the data stream are multiplexed so as to read in advance the top portion of the data stream to be processed next.

摘要翻译： 本发明提供一种在连续处理多个数据流的情况下能够提高处理性能的流处理装置。 准备与数据流不同的控制流，并且根据控制流预先更新程序和参数。 在存储程序和参数的流处理装置的存储器中准备双缓冲区。 要输入的数据流的位置被写入控制流中，并且用于读取数据流的缓冲器被多路复用，以便预先读取接下来要处理的数据流的顶部。

公开(公告)号：US20090245664A1

公开(公告)日：2009-10-01

申请号：US12401613

申请日：2009-03-10

申请人： Keisuke MATSUMOTO ,  Seiji MOCHIZUKI ,  Kenichi IWATA ,  Fumitaka IZUHARA ,  Motoki KIMURA

发明人： Keisuke MATSUMOTO ,  Seiji MOCHIZUKI ,  Kenichi IWATA ,  Fumitaka IZUHARA ,  Motoki KIMURA

IPC分类号： G06K9/36

CPC分类号： H04N19/86 ,  H04N19/103 ,  H04N19/124 ,  H04N19/17 ,  H04N19/176 ,  H04N19/436 ,  H04N19/61

摘要： The present invention provides an image encoding device which does not necessitate reference of a quantization parameter between consecutive macroblocks across a parallel processing area boundary without forming slices. The image encoding device encodes a macroblock of an encoding target image by parallel processing sequentially from the top of a parallel processing area, and possesses an encoding element for every parallel processing area. When all the quantized orthogonally-transformed coefficients of a top macroblock of the parallel processing area are zero, the encoding element adds a non-zero coefficient to a part of the coefficients, making the coefficients non-zero. Accordingly, generation of a skip macroblock in the top macroblock of each parallel processing area is suppressed. Since slice formation is not necessary, the prediction over a parallel processing area boundary is applied, and encoding efficiency improves. Errors are not generated in decoding and the decoded image quality does not deteriorate.

摘要翻译： 本发明提供一种图像编码装置，其不需要跨并行处理区域边界的连续宏块之间的量化参数的引用而不形成切片。 图像编码装置通过从并行处理区域的顶部顺序并行处理对编码对象图像的宏块进行编码，并具有每个并行处理区域的编码元素。 当并行处理区域的顶部宏块的所有量化的正交变换系数为零时，编码元件将一个非零系数加到系数的一部分，使系数不为零。 因此，抑制了每个并行处理区域的顶部宏块中的跳过宏块的生成。 由于不需要切片形成，因此应用了并行处理区域边界的预测，并且提高了编码效率。 在解码中不产生错误，解码的图像质量不会恶化。