公开(公告)号：US20150035066A1

公开(公告)日：2015-02-05

申请号：US14378219

申请日：2012-04-27

申请人： Hiroshi Otsuka ,  Toshiyuki Oishi ,  Eigo Kuwata ,  Takashi Yamasaki ,  Makoto Kimura ,  Masatoshi Nakayama

发明人： Hiroshi Otsuka ,  Toshiyuki Oishi ,  Eigo Kuwata ,  Takashi Yamasaki ,  Makoto Kimura ,  Masatoshi Nakayama

IPC分类号： H01L27/088 ,  H01L23/66

CPC分类号： H01L27/088 ,  H01L23/66 ,  H01L27/0207 ,  H01L27/0605 ,  H01L27/0629 ,  H01L27/0727 ,  H01L29/0642 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/7786 ,  H01L2223/6611 ,  H01L2924/0002 ,  H03F3/195 ,  H01L2924/00

摘要： An FET chip is configured to include an oscillation suppression circuit that has a gate capacitance C formed between a gate electrode 5c and two-dimensional electron gas, and a channel resistance R between the gate electrode 5c and a source electrode 7c, and therefore the oscillation suppression circuit is loaded by only an FET process to make an MMIC design unnecessary, so that it is possible to attain stabilization of an FET while suppressing increase in cost, and to suppress oscillation.

摘要翻译： FET芯片被配置为包括在栅极电极5c和二维电子气体之间形成栅极电容C的振荡抑制电路以及栅极电极5c和源极电极7c之间的沟道电阻R，因此振荡 抑制电路仅通过FET工艺加载，从而不需要MMIC设计，从而可以在抑制成本增加并抑制振荡的同时实现FET的稳定化。