利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

5 条记录 (耗时 0.021 秒)

    Bias circuit for a display driver operational amplifier
    4.
    发明授权
    Bias circuit for a display driver operational amplifier 失效
    用于显示驱动器运算放大器的偏置电路

    公开(公告)号：US07199662B2

    公开(公告)日：2007-04-03

    申请号：US11007234

    申请日：2004-12-09

    申请人： Yoshikazu Seko

    发明人： Yoshikazu Seko

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45183 ,  H03F1/02 ,  H03F1/3211 ,  H03F3/45237 ,  H03F3/45475

    摘要： Output circuit in which electric current consumption of operational amplifiers therein is reduced and distortion of the output waveforms of the operational amplifiers is also reduced. A bias circuit 30 is constituted from a bias current source 31, a bias voltage extracting circuit 22, a precharge circuit 34, and a precharge power supply 35. When a timing signal Tp of a predetermined pulse width is supplied to the bias circuit 30, MOS transistors 28 and 29 in the precharge circuit 34 are turned on during the period of its pulse width, and desired precharge voltages Vpn and Vpp are charged to capacitors Cn and Cp from the precharge power supply 35. The voltages charged to the capacitors Cn and Cp are supplied to operational amplifiers through an N-bias line 11 and a P-bias line 12 as bias voltages VbiasA and VbiasB, respectively, so that the operational amplifiers are controlled to be biased at high biases. The bias voltages VbiasA and VbiasB after precharging transition from high to low according to CR time constant curves for the discharge paths of the capacitors Cn and Cp. This transition period can be set by adjusting the precharge voltages using the variable precharge power supply 35.

    摘要翻译： 其中运算放大器的电流消耗减小的输出电路和运算放大器的输出波形的失真也减少。 偏置电路30由偏置电流源31，偏置电压提取电路22，预充电电路34和预充电电源35构成。 当将预定脉冲宽度的定时信号Tp提供给偏置电路30时，预充电电路34中的MOS晶体管28和29在其脉冲宽度期间导通，并且期望的预充电电压Vpn和Vpp被充电到电容器 Cn和Cp。通过N偏置线11和P偏置线12分别将充电到电容器Cn和Cp的电压作为偏置电压VbiasA和VbiasB提供给运算放大器，使得 运算放大器被控制为偏置高偏压。 根据电容器Cn和Cp的放电路径的CR时间常数曲线，从高电平向低电平转变后的偏置电压VbiasA和VbiasB。 可以通过使用可变预充电电源35调节预充电电压来设定该过渡时段。

    Output circuit
    5.
    发明申请
    Output circuit 失效
    输出电路

    公开(公告)号：US20050128002A1

    公开(公告)日：2005-06-16

    申请号：US11007234

    申请日：2004-12-09

    申请人： Yoshikazu Seko

    发明人： Yoshikazu Seko

    IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  H03F1/02 ,  H03F1/32 ,  H03F3/45 ,  H04N5/66

    CPC分类号： H03F3/45183 ,  H03F1/02 ,  H03F1/3211 ,  H03F3/45237 ,  H03F3/45475

    摘要： Output circuit in which electric current consumption of operational amplifiers therein is reduced and distortion of the output waveforms of the operational amplifiers is also reduced. A bias circuit 30 is constituted from a bias current source 31, a bias voltage extracting circuit 22, a precharge circuit 34, and a precharge power supply 35. When a timing signal Tp of a predetermined pulse width is supplied to the bias circuit 30, MOS transistors 28 and 29 in the precharge circuit 34 are turned on during the period of its pulse width, and desired precharge voltages Vpn and Vpp are charged to capacitors Cn and Cp from the precharge power supply 35. The voltages charged to the capacitors Cn and Cp are supplied to operational amplifiers through an N-bias line 11 and a P-bias line 12 as bias voltages VbiasA and VbiasB, respectively, so that the operational amplifiers are controlled to be biased at high biases. The bias voltages VbiasA and VbiasB after precharging transition from high to low according to CR time constant curves for the discharge paths of the capacitors Cn and Cp. This transition period can be set by adjusting the precharge voltages using the variable precharge power supply 35.

    摘要翻译： 其中运算放大器的电流消耗减小的输出电路和运算放大器的输出波形的失真也减少。 偏置电路30由偏置电流源31，偏置电压提取电路22，预充电电路34和预充电电源35构成。 当将预定脉冲宽度的定时信号Tp提供给偏置电路30时，预充电电路34中的MOS晶体管28和29在其脉冲宽度期间导通，并且期望的预充电电压Vpn和Vpp被充电到电容器 Cn和Cp。通过N偏置线11和P偏置线12分别将充电到电容器Cn和Cp的电压作为偏置电压VbiasA和VbiasB提供给运算放大器，使得 运算放大器被控制为偏置高偏压。 根据电容器Cn和Cp的放电路径的CR时间常数曲线，从高电平向低电平转变后的偏置电压VbiasA和VbiasB。 可以通过使用可变预充电电源35调节预充电电压来设定该过渡时段。