公开(公告)号：US20120281985A1

公开(公告)日：2012-11-08

申请号：US13463136

申请日：2012-05-03

申请人： Hiroyuki HONMA ,  Masahiro Shioda ,  Toru Katagiri

发明人： Hiroyuki HONMA ,  Masahiro Shioda ,  Toru Katagiri

IPC分类号： H04J14/08

CPC分类号： H04J3/1652 ,  H04J2203/0089

摘要： A transmitting apparatus includes a frame dividing circuit that maps frame data of each of a plurality of frames whose period is different from each other into one or a plurality of internal frames having a fixed frame period and a fixed transmission rate, based on a predetermined internal clock; a cross-connect circuit that cross-connects the frame data of each in a time division multiplexing system based on the internal clock in units of the internal frames; and a frame combining circuit that demaps, into any of the plurality of frames, or multiplexes, data of one or a plurality of internal frames cross-connected by the cross-connect circuit.

摘要翻译： 发送装置包括帧分割电路，其基于预定的内部将帧周期彼此不同的多个帧的帧数据映射到具有固定帧周期和固定传输速率的一个或多个内部帧 时钟; 交叉连接电路，以内部时钟为单位，以时分复用系统中的各帧的帧数据交叉连接; 以及帧合成电路，其将多个帧中的任一个解映射或多路复用由交叉连接电路交叉连接的一个或多个内部帧的数据。

公开(公告)号：US20130058643A1

公开(公告)日：2013-03-07

申请号：US13665146

申请日：2012-10-31

申请人： Hiroyuki HONMA ,  Toru Katagiri ,  Hiromichi Makishima ,  Masahiro Shioda ,  Hiroyuki Kitajima ,  Ichiro Yokokura

发明人： Hiroyuki HONMA ,  Toru Katagiri ,  Hiromichi Makishima ,  Masahiro Shioda ,  Hiroyuki Kitajima ,  Ichiro Yokokura

IPC分类号： H04B10/08

CPC分类号： H04J3/1652 ,  H04J2203/0058 ,  H04L43/0876

摘要： A data amount derivation apparatus includes: a first calculator configured to derive, for one series of parallelized mapping signals, amount of data in each frame period for a frame into which the parallelized mapping signals are mapped; and a second calculator configured to sum up amounts of data in N frame periods, where N is an integer, and to derive the resulting summation value as the amount of data to be mapped into the frame, each of the amounts of data in each of the frame periods being derived by the first calculator.

摘要翻译： 数据量导出装置包括：第一计算器，被配置为针对一系列并行映射信号，对并行映射信号映射到的帧的每个帧周期中的数据量; 以及第二计算器，被配置为对N个帧周期内的数据量进行相加，其中N是整数，并且导出所得到的求和值作为要映射到该帧中的数据量，每个数据量 帧周期由第一计算器导出。

公开(公告)号：US20120302185A1

公开(公告)日：2012-11-29

申请号：US13436796

申请日：2012-03-30

申请人： Shingo HOTTA ,  Hiromichi MAKISHIMA ,  Hiroyuki HONMA ,  Ichirou YOKOKURA

发明人： Shingo HOTTA ,  Hiromichi MAKISHIMA ,  Hiroyuki HONMA ,  Ichirou YOKOKURA

IPC分类号： H04B1/04

CPC分类号： H04B17/004 ,  H04B10/0799 ,  H04B10/50 ,  H04B17/20 ,  H04J3/07 ,  H04J3/1652

摘要： In a transmission apparatus, a comparison unit provides threshold values associated with an amount of data indicating a signal frequency, and compares an input parameter obtained by cumulatively adding a correction amount to the parameter with the threshold values. When the input parameter is within a range defined by the threshold values, a correction unit outputs a value of the input parameter. When the input parameter is out of the defined range, the correction unit outputs an associated one of the threshold values so as to eliminate an amount exceeding or falling short of the defined range, to thereby correct the input parameter. An addition unit detects the correction amount which is an amount of the immediately preceding value of the input parameter exceeding or falling short of the defined range, and cumulatively adds the correction amount to the input parameter used for the comparison of this time.

摘要翻译： 在发送装置中，比较单元提供与指示信号频率的数据量相关联的阈值，并将通过将该修正量累加到该参数而获得的输入参数与阈值进行比较。 当输入参数在由阈值定义的范围内时，校正单元输出输入参数的值。 当输入参数超出限定范围时，校正单元输出相关联的一个阈值，以便消除超过或超出限定范围的量，从而校正输入参数。 加法单元检测作为输入参数的紧接在前的值的量的校正量超过或者不超过限定范围，并且将校正量累加到用于此时间的比较的输入参数。

公开(公告)号：US20120134367A1

公开(公告)日：2012-05-31

申请号：US13220297

申请日：2011-08-29

申请人： Masafumi OHTA ,  Hiromichi MAKISHIMA ,  Hiroyuki HONMA

发明人： Masafumi OHTA ,  Hiromichi MAKISHIMA ,  Hiroyuki HONMA

IPC分类号： H04L12/56

CPC分类号： H04W72/0446 ,  H04B7/2628 ,  H04J3/07 ,  H04J3/1652 ,  H04W84/08

摘要： A signal distribution circuit includes: first to n-th input lines on which first to n-th signals are respectively input; first to (n−1)th selectors each of which selects one of two inputs under the control of a select signal; and a first output line on which the first signal is output and second to n-th output lines on which output signals of the first to (n−1)th selectors are respectively output, wherein: the first and second inputs of the first selector are supplied with the first signal and the second signal, respectively, the first and second inputs of the i-th selector (i is an integer between 2 and (n−1)) are supplied with the output signal of the (i−1)th selector and the (i+1)th signal, respectively, and any of the selectors, when selected by the select signal, selects the second input and, when not selected by the select signal, selects the first input.

摘要翻译： 信号分配电路包括：分别输入第一至第n信号的第一至第n输入线; 第一至第（n-1）个选择器，每个选择器在选择信号的控制下选择两个输入中的一个; 以及输出第一信号的第一输出线和分别输出第一至第（n-1）个选择器的输出信号的第二至第n输出线，其中：第一选择器的第一和第二输入 分别提供第一信号和第二信号，第i个选择器的第一和第二输入（i是2和（n-1）之间的整数）被提供有第（i-1）的输出信号 ）选择器和第（i + 1）个信号，并且当选择信号选择时，任何选择器选择第二输入，并且当未被选择信号选择时，选择第一输入。

公开(公告)号：US20090290488A1

公开(公告)日：2009-11-26

申请号：US12340904

申请日：2008-12-22

申请人： Hiroyuki HONMA

发明人： Hiroyuki HONMA

IPC分类号： G06F11/00

CPC分类号： H04J3/14 ,  H04J2203/006 ,  H04J2203/0069 ,  H04J2203/0094

摘要： The present invention is a transmission system, a path control method, and a transmission device, and is the path control method in the transmission system forming a virtual concatenation group by virtually concatenating each path signal transmitted through a plurality of paths being a logical communication path, which manages an active state and a stand-by state of member paths of the virtual concatenation group and when there is abnormality in any of the member paths in the active state, controls any of the member paths in the stand-by state to the active state in place of the abnormal member path, thereby realizing more flexible and efficient path level redundancy.

摘要翻译： 本发明是传输系统，路径控制方法和传输设备，并且是通过虚拟连接通过多条路径传输的每个路径信号作为逻辑通信路径而形成虚拟级联组的传输系统中的路径控制方法 管理虚级联组的成员路径的活动状态和待机状态，并且当处于活动状态的任何成员路径中存在异常时，将备用状态中的任何成员路径控制为 激活状态代替异常成员路径，从而实现更灵活高效的路径级冗余。