公开(公告)号：US20250070636A1

公开(公告)日：2025-02-27

申请号：US18722001

申请日：2022-10-21

Applicant: HITACHI, LTD.

Inventor： Hangxian GAO ,  So WATANABE ,  Hiroshi SUZUKI

IPC: H02M1/00 ,  H02M1/08 ,  H02M7/537 ,  H03K17/16

Abstract: The present invention adjusts the surge voltage of a switching element to a prescribed value or lower while reducing switching loss in accordance with an operation condition. The present invention includes a gate driving circuit unit that drives a semiconductor switching element and a feedback current control unit that applies, to a gate G of the semiconductor switching element, a feedback current which is calculated by multiplying the change rate of electricity applied by the gate driving circuit unit to the semiconductor switching element by a prescribed gain, in which the change rate of electricity is the time change rate of the voltage and/or current applied to the semiconductor switching element; and the feedback current control unit adjusts the surge voltage of the semiconductor switching element by changing the gain in accordance with an operation condition of the semiconductor switching element.

公开(公告)号：US20140001512A1

公开(公告)日：2014-01-02

申请号：US14015213

申请日：2013-08-30

Applicant: Hitachi, Ltd.

Inventor： So WATANABE ,  Mutsuhiro MORI ,  Taiga ARAI

IPC: H01L29/739

CPC classification number: H01L29/7395 ,  H01L21/2815 ,  H01L29/0607 ,  H01L29/0611 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0646 ,  H01L29/0657 ,  H01L29/0847 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66348 ,  H01L29/7397

Abstract: A semiconductor device provides a gate electrode formed on a lateral face of a wide trench, and thereby the gate electrode is covered by a gate insulating layer and a thick insulating layer to be an inter layer. Therefore, a parasitic capacitance of the gate becomes small, and there is no potential variation of the gate since there is no floating p-layer so that a controllability of the dv/dt can be improved. In addition, the conductive layer between the gate electrodes can relax the electric field applied to the corner of the gate electrode. In consequence, compatibility of low loss and low noise and high reliability can be achieved.

Abstract translation: 半导体器件提供形成在宽沟槽的侧面上的栅电极，由此栅电极被栅绝缘层和厚绝缘层覆盖为内层。 因此，栅极的寄生电容变小，并且由于不存在浮置p层而不具有栅极的电位变化，因此能够提高dv / dt的可控性。 此外，栅电极之间的导电层可以放宽施加到栅电极的角部的电场。 因此，可以实现低损耗和低噪声以及高可靠性的兼容性。