公开(公告)号：US20240140448A1

公开(公告)日：2024-05-02

申请号：US18273338

申请日：2021-08-26

Applicant: Hitachi Astemo, Ltd.

Inventor： Momoka KASUYA ,  Hiroki YAMAZAKI ,  Mikio KATAOKA ,  Nobuyoshi MORITA ,  Kota IDEGUCHI ,  Yasuhiro FUJII

IPC: B60W50/023 ,  B60W50/04 ,  G06F21/55

CPC classification number: B60W50/023 ,  B60W50/04 ,  G06F21/55

Abstract: An electronic control device 140 is mounted on an on-vehicle control system 10 that performs travel control of an automobile, and is communicatively connected to a plurality of control devices including a first control device (electronic control device 120) and a second control device (electronic control device 130). The electronic control device 140 includes an attack determination unit 145 that determines presence or absence of a security attack in each control device, and a redundant system execution determination unit 146 that determines whether to cause the second control device to execute a redundant function similar to or a part of the function performed by the first control device based on the result of determination by the attack determination unit 145.

公开(公告)号：US20230214494A1

公开(公告)日：2023-07-06

申请号：US17928050

申请日：2021-02-05

Applicant: Hitachi Astemo, Ltd.

Inventor： Hiroki YAMAZAKI ,  Momoka KASUYA ,  Nobuyoshi MORITA ,  Yasuhiro FUJII ,  Mikio KATAOKA ,  Masaki FUJIWARA

IPC: G06F21/57 ,  G06F9/4401

CPC classification number: G06F21/575 ,  G06F9/4401 ,  G06F2221/034

Abstract: An electronic control device includes a tamper storage unit that stores a secure boot key and a control key, and has tamper resistance, a processor that is able to execute a program, a verification unit that verifies a program by using the secure boot key, performs secure boot causing the processor to execute the program based on a result of the verification, and has tamper resistance, a calculation unit that performs calculation related to encryption using the control key, and has tamper resistance, and a general storage unit that stores a first program that implements a delegated verification unit to which authority of the secure boot is delegated from the verification unit and a second program that implements a control unit that uses the calculation unit, and does not have tamper resistance. The verification unit delegates the authority of the secure boot to the delegated verification unit to end the execution of the secure boot when the verification for the first program and the second program is successful and the processor is caused to execute the first program and the second program, the calculation unit starts an operation when the verification unit ends the execution of the secure boot, and the delegated verification unit is able to simultaneously execute processing with the calculation unit.

公开(公告)号：US20220405226A1

公开(公告)日：2022-12-22

申请号：US17777398

申请日：2020-11-09

Applicant: HITACHI ASTEMO, LTD.

Inventor： Momoka KASUYA ,  Hiroki YAMAZAKI ,  Nobuyoshi MORITA ,  Shuhei KANEKO

IPC: G06F13/40 ,  G06F21/62

Abstract: An electronic control device includes: a first processing unit; a second processing unit; and a transfer control unit. The second processing unit requires a longer time for an activation process than the first processing unit, the transfer control unit includes a communication unit capable of transferring communication data received from an outside to the first processing unit and the second processing unit, the first processing unit includes a first control part that processes the communication data transferred from the transfer control unit, the second processing unit includes a second control part that processes the communication data transferred from the transfer control unit, and the transfer control unit does not set the second processing unit as a transfer destination of the communication data and sets the first processing unit to be included in the transfer destination until the activation process of the second processing unit is completed and sets at least the second processing unit as the transfer destination of the communication data when the activation process of the second processing unit is completed.