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公开(公告)号：US20240160433A1
公开(公告)日：2024-05-16
申请号：US18549670
申请日：2022-03-01
Applicant: HITACHI ASTEMO, LTD.
Inventor： Teruaki NOMURA , Nobuyoshi MORITA , Masashi YANO , Mikio KATAOKA , Yasuhiro FUJII , Shuhei KANEKO
Abstract: An object is to shorten a time required for reprogramming of a control device including a single-bank microcomputer. An ECU 901 is a control device including a first microcomputer 1 and a second microcomputer 2 that execute a program stored in a rewriting area 13 in which a memory bank is configured as a single bank. The second microcomputer 2 includes a preprocessing unit 214 that performs preprocessing on a rewriting program 5 in reprogramming processing of rewriting the program stored in the rewriting area 13 into the rewriting program 5, and a transmission unit 213 that transmits the preprocessed rewriting program 5 to the first microcomputer 1. The first microcomputer 1 includes a reception unit 121 that receives the rewriting program 5 transmitted from the second microcomputer 2, and a writing unit 122 that writes the received rewriting program 5 in the rewriting area 13.
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公开(公告)号：US20220405226A1
公开(公告)日：2022-12-22
申请号：US17777398
申请日：2020-11-09
Applicant: HITACHI ASTEMO, LTD.
Inventor： Momoka KASUYA , Hiroki YAMAZAKI , Nobuyoshi MORITA , Shuhei KANEKO
Abstract: An electronic control device includes: a first processing unit; a second processing unit; and a transfer control unit. The second processing unit requires a longer time for an activation process than the first processing unit, the transfer control unit includes a communication unit capable of transferring communication data received from an outside to the first processing unit and the second processing unit, the first processing unit includes a first control part that processes the communication data transferred from the transfer control unit, the second processing unit includes a second control part that processes the communication data transferred from the transfer control unit, and the transfer control unit does not set the second processing unit as a transfer destination of the communication data and sets the first processing unit to be included in the transfer destination until the activation process of the second processing unit is completed and sets at least the second processing unit as the transfer destination of the communication data when the activation process of the second processing unit is completed.
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公开(公告)号：US20220171855A1
公开(公告)日：2022-06-02
申请号：US17423271
申请日：2020-01-15
Applicant: Hitachi Astemo, Ltd.
Inventor： Hiroki YAMAZAKI , Shuhei KANEKO , Nobuyoshi MORITA
IPC: G06F21/57 , B60R16/02 , G06F9/4401
Abstract: The present invention provides a technology to ensure security during fast boot-up. Provided according to the present invention is an electronic control device installed on a mobile body, the electronic control device including a controller which controls a microcomputer using code, a security verifier which makes security verification of the code, and boot-up code which is part of the code and is executed when the microcomputer is booted. The controller enables, when the code or the boot-up code has been verified by the security verifier at the time of a transition of the microcomputer to a shutdown state, the boot-up code to be executed during next boot-up.
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公开(公告)号：US20210377073A1
公开(公告)日：2021-12-02
申请号：US17284489
申请日：2019-10-10
Applicant: HITACHI ASTEMO, LTD.
Inventor： Nobuyoshi MORITA , Hiroki YAMAZAKI , Kota IDEGUCHI
Abstract: An information processing device which transmits and receives a message to which a communication ID indicating a class has been assigned, includes: a storage unit which stores, for each of the communication IDs, a communication counter for verifying a recency of a communication; a recency information management unit which updates the communication counter based on a predetermined condition; an abnormality monitoring unit which identifies an influence range of an abnormality that occurred; and a message generation unit which generates a synchronization request message including the communication ID indicating that it is a message requesting a synchronization of the communication counter, and a synchronization target identifier indicating the influence range identified by the abnormality monitoring unit.
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公开(公告)号：US20230070879A1
公开(公告)日：2023-03-09
申请号：US17800690
申请日：2021-01-29
Applicant: Hitachi Astemo, Ltd.
Inventor： Nobuyoshi MORITA , Masashi YANO , Mikio KATAOKA , Shuhei KANEKO , Teruaki NOMURA
IPC: G06F8/65
Abstract: An information processing device that executes a program includes: a storage unit that includes a plurality of regions for storing a rewritable program; a calculation unit that executes a program stored in the storage unit; a start region specification unit that specifies, from the plurality of regions, a start region in which the calculation unit is executing a program; a rule update unit that specifies a rewrite target region in which a program can be rewritten based on information on the specified start region; and a reception selection unit that selectively receives a rewrite program stored in the rewrite target region.
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Patent Agency Ranking
公开(公告)号：US20220407873A1
公开(公告)日：2022-12-22
申请号：US17772704
申请日：2020-09-18
Applicant: HITACHI ASTEMO, LTD.
Inventor： Nobuyoshi MORITA
IPC: H04L9/40
Abstract: An appropriate countermeasure is taken against a cyber-security attack at an appropriate timing. An analysis device, configured using a computer including a computation device that executes predetermined computation processing and a storage device accessible by the computation device, includes: a communication unit that receives, by the computation device, a log of an information processing device mounted on an instrument; an attack progress analysis unit that calculates, by the computation device, an intrusion location in a route from an intrusion point on the instrument to a protected asset from the received log; and an urgency degree determination unit that determines, by the computation device, an urgency degree of a countermeasure against an attack based on an analysis result of the attack progress analysis unit.
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公开(公告)号：US20250023724A1
公开(公告)日：2025-01-16
申请号：US18712800
申请日：2022-08-12
Applicant: HITACHI ASTEMO, LTD.
Inventor： Nobuyoshi MORITA , Mikio KATAOKA , Yasuhiro FUJII , Masashi YANO
IPC: H04L9/08
Abstract: The present disclosure provides an information processing apparatus that enables updating of a key for program verification without invalidating a program verification function. An information processing apparatus 1 that calculates a verification value using a key for program verification and that verifies whether the verification value matches a verification expected value stored in advance. The information processing apparatus 1 includes: a key updating control unit 12 that updates the key; a storage unit 100 that stores in advance a verification expected value corresponding to a key updated by the key updating control unit 12; and a verification expected value changing unit 13 that when a verification value calculated based on the updated key is verified, changes the verification expected value in the storage unit, the verification expected value being referred to for verification, to a verification value corresponding to the updated key.
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公开(公告)号：US20250007697A1
公开(公告)日：2025-01-02
申请号：US18710233
申请日：2022-08-10
Applicant: Hitachi Astemo, Ltd.
Inventor： Nobuyoshi MORITA , Mikio KATAOKA , Yasuhiro FUJII , Masashi YANO
IPC: H04L9/08
Abstract: The present disclosure provides an information processing device and a key management device capable of safely writing key information even in a manufacturing environment other than a manufacturing environment of its own company. An information processing device 1 that generates and manages a key includes a storage unit 100 that stores a public key received from a key management device 3, a key generation unit 13 that generates a use key, and a communication unit 11 capable of communicating with the outside. The key generation unit 13 generates a use key in an invalid state in which the communication unit 11 blocks signal input from the outside. The communication unit 11 transmits the use key encrypted with the public key to the key management device 3.
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公开(公告)号：US20240045970A1
公开(公告)日：2024-02-08
申请号：US18257961
申请日：2021-08-26
Applicant: HITACHI ASTEMO, LTD.
Inventor： Nobuyoshi MORITA , Yasuhiro FUJII , Masashi YANO , Mikio KATAOKA
CPC classification number: G06F21/575 , G06F21/554
Abstract: Provided is an analysis device that reduces false detection of an attack event to appropriately output an anomaly notification.
The analysis device configured to be communicable with a plurality of monitoring-target devices collects monitoring results of each of the monitoring-target devices, determines whether an anomaly has occurred in each of the monitoring-target devices, based on the monitoring results, and
determines whether to output an anomaly notification indicating the anomaly, based on a result of the determination and code verification results of each of the monitoring-target devices.-
公开(公告)号：US20230214494A1
公开(公告)日：2023-07-06
申请号：US17928050
申请日：2021-02-05
Applicant: Hitachi Astemo, Ltd.
Inventor： Hiroki YAMAZAKI , Momoka KASUYA , Nobuyoshi MORITA , Yasuhiro FUJII , Mikio KATAOKA , Masaki FUJIWARA
IPC: G06F21/57 , G06F9/4401
CPC classification number: G06F21/575 , G06F9/4401 , G06F2221/034
Abstract: An electronic control device includes a tamper storage unit that stores a secure boot key and a control key, and has tamper resistance, a processor that is able to execute a program, a verification unit that verifies a program by using the secure boot key, performs secure boot causing the processor to execute the program based on a result of the verification, and has tamper resistance, a calculation unit that performs calculation related to encryption using the control key, and has tamper resistance, and a general storage unit that stores a first program that implements a delegated verification unit to which authority of the secure boot is delegated from the verification unit and a second program that implements a control unit that uses the calculation unit, and does not have tamper resistance. The verification unit delegates the authority of the secure boot to the delegated verification unit to end the execution of the secure boot when the verification for the first program and the second program is successful and the processor is caused to execute the first program and the second program, the calculation unit starts an operation when the verification unit ends the execution of the secure boot, and the delegated verification unit is able to simultaneously execute processing with the calculation unit.
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