Data bus connection for memory device
    1.
    发明申请
    Data bus connection for memory device 失效
    存储设备的数据总线连接

    公开(公告)号:US20050033865A1

    公开(公告)日:2005-02-10

    申请号:US10496920

    申请日:2002-11-21

    申请人: Hua Li Yuan Chin

    发明人: Hua Li Yuan Chin

    摘要: A data bus of a DVD+RW recorder between a DSP and a SDRAM usually needs a multilayer wiring board. In order to simplify the layout of the wiring board of the data bus there is provided a method for connecting at least a first and a second integrated circuit by providing the first integrated circuit having a plurality of first logical I/O ports physically arranged in a first order at the periphery, and providing the second integrated circuit having a plurality of second logical I/O ports physically arranged in a second order at the periphery, wherein each first I/O port is to be connected to one of said second I/O ports. The first and second I/O logical ports are connected independently from the first and/or second physical order, so that connection lines do not cross each other.

    摘要翻译: DSP与SDRAM之间的DVD + RW刻录机的数据总线通常需要多层布线板。 为了简化数据总线的布线板的布局,提供了一种通过提供第一集成电路来连接至少第一和第二集成电路的方法,该第一集成电路具有物理地布置在第一和第二集成电路中的多个第一逻辑I / O端口 并且提供第二集成电路,该第二集成电路具有多个第二逻辑I / O端口,该第二逻辑I / O端口在外围以二级物理地布置,其中每个第一I / O端口将被连接到所述第二I / O端口 第一和第二I / O逻辑端口独立于第一和/或第二物理顺序连接,使得连接线不互相交叉。