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公开(公告)号：US20160377804A1
公开(公告)日：2016-12-29
申请号：US15198821
申请日：2016-06-30
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo
CPC classification number: G02B6/124 , G02B6/30 , H04B10/801 , H04J14/00 , H04L45/62 , H04L49/10 , H04L49/109 , H04Q11/00
Abstract: System and method embodiments are provided for optical I/O arrays for wafer scale testing. A wafer includes a plurality of dies of PIC chips. Each die includes a plurality of first and second optical I/O elements each configured to couple to a testing probe array. A row of I/O elements includes alternating ones of the first and second optical I/O elements. Each die also includes a first waveguide and a second waveguide coupling a first one of the first and second optical I/O elements to a second one of the first and second optical I/O elements, respectively. The first and second optical I/O elements configured such that the testing probe array couples to at least some of the first optical I/O elements from a first side of the PIC chip and couples to at least some of the second optical I/O elements from a second side of the PIC chip.
Abstract translation: 提供了用于晶片刻度测试的光学I / O阵列的系统和方法实施例。 晶片包括多个PIC芯片的管芯。 每个管芯包括多个第一和第二光学I / O元件，每个元件被配置为耦合到测试探针阵列。 一行I / O元件包括第一和第二光学I / O元件中的交替的I / O元件。 每个管芯还包括分别将第一和第二光学I / O元件中的第一光纤I / O元件耦合到第一和第二光学I / O元件中的第二光学I / O元件的第一波导和第二波导。 第一和第二光学I / O元件被配置为使得测试探针阵列从PIC芯片的第一侧耦合到至少一些第一光学I / O元件，并耦合到第二光学I / O的至少一些 元件从PIC芯片的第二面。
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公开(公告)号：US09383516B2
公开(公告)日：2016-07-05
申请号：US14475145
申请日：2014-09-02
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo
IPC: G02B6/34
CPC classification number: G02B6/34 , G02B6/124 , G02B6/30 , H04B10/40 , H04B10/801 , H04L45/00 , H04L45/62
Abstract: System and method embodiments are provided for high density on-chip optical input/output (I/O) arrays with partition waveguide routing topology. System and apparatus embodiments for on-chip optical I/O arrays provide for doubling the density of optical I/O arrays in a given footprint on a photonic integrated circuit (PIC) chip. System and apparatus embodiments for on-chip optical I/O arrays also provide waveguide routing topology to provide signal feedback to facility automated active alignment and coupling of optical fiber arrays in to surface grating coupler elements without use of waveguide crossings and without intersecting with waveguides connecting devices to I/O ports. In an embodiment, a PIC chip includes a plurality of first optical I/O elements and a plurality of second optical I/O elements, wherein a row of I/O elements comprises alternating ones of the first optical I/O elements and the second optical I/O elements.
Abstract translation: 为具有分区波导路由拓扑的高密度片上光输入/输出（I / O）阵列提供了系统和方法实施例。 用于片上光学I / O阵列的系统和设备实施例提供了在光子集成电路（PIC）芯片上的给定占用空间中将光学I / O阵列的密度加倍。 用于片上光I / O阵列的系统和装置实施例还提供波导路由拓扑，以提供信号反馈以便将光纤阵列自动主动对准和耦合到表面光栅耦合器元件中，而不使用波导交叉并且不与波导连接相交 设备到I / O端口。 在一个实施例中，PIC芯片包括多个第一光学I / O元件和多个第二光学I / O元件，其中一行I / O元件包括交替的第一光学I / O元件和第二光学I / 光学I / O元件。
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公开(公告)号：US20160204868A1
公开(公告)日：2016-07-14
申请号：US14726037
申请日：2015-05-29
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo , Dominic John Goodwill , Mikelis Svilans
IPC: H04B10/516 , H04J14/02
CPC classification number: H04B10/516 , H04B10/25758 , H04B10/25759 , H04B10/5053 , H04B10/506 , H04J14/02
Abstract: An optical transmitter is provided. The optical transmitter includes a first optical modulator configured to modulate a first optical carrier signal having a first wavelength and a first power using a first data bit to generate a first modulated output signal, a second optical modulator configured to modulate a second optical carrier signal having a second wavelength and a second power using a second data bit to generate a second modulated output signal, wherein the second optical modulator and the first optical modulator modulate in parallel, and an optical wavelength multiplexer configured to sum the first modulated output signal and the second modulated output signal into an analog signal suitable for transmission over an optical fiber.
Abstract translation: 提供光发射机。 光发射机包括第一光调制器，其被配置为使用第一数据位来调制具有第一波长和第一功率的第一光载波信号，以产生第一调制输出信号;第二光调制器，被配置为调制具有 第二波长和第二功率，使用第二数据比特来产生第二调制输出信号，其中所述第二光调制器和所述第一光调制器并行调制，以及光波长多路复用器，被配置为将所述第一调制输出信号和所述第二调制输出信号 调制输出信号转换为适合通过光纤传输的模拟信号。
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公开(公告)号：US09753220B2
公开(公告)日：2017-09-05
申请号：US15198821
申请日：2016-06-30
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo
IPC: G02B6/12 , G02B6/124 , G02B6/30 , H04J14/00 , H04L12/933 , H04L12/721
CPC classification number: G02B6/124 , G02B6/30 , H04B10/801 , H04J14/00 , H04L45/62 , H04L49/10 , H04L49/109 , H04Q11/00
Abstract: System and method embodiments are provided for optical I/O arrays for wafer scale testing. A wafer includes a plurality of dies of PIC chips. Each die includes a plurality of first and second optical I/O elements each configured to couple to a testing probe array. A row of I/O elements includes alternating ones of the first and second optical I/O elements. Each die also includes a first waveguide and a second waveguide coupling a first one of the first and second optical I/O elements to a second one of the first and second optical I/O elements, respectively. The first and second optical I/O elements configured such that the testing probe array couples to at least some of the first optical I/O elements from a first side of the PIC chip and couples to at least some of the second optical I/O elements from a second side of the PIC chip.
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5.发明申请Active Photonic Integrated Circuit (PIC) With Embedded Coupling Efficiency Monitoring 有权具有嵌入式耦合效率监测的有源光子集成电路（PIC）公开(公告)号：US20160334590A1
公开(公告)日：2016-11-17
申请号：US14712153
申请日：2015-05-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo , Dominic John Goodwill , Eric Bernier
CPC classification number: G02B6/4225 , G02B6/1225 , G02B6/34 , G02B6/4291
Abstract: An apparatus comprising a first photonic device comprising a waveguide loop configured to guide a first light from a first location of a surface to a second location of the surface, and a second photonic device comprising a light source configured to provide the first light, and a first alignment coupler optically coupled to the light source and configured to optically couple to the waveguide loop at the first location, a second alignment coupler configured to optically couple to the waveguide loop at the second location, and a photodetector optically coupled to the second alignment coupler and configured to detect the first light when the waveguide loop is aligned with the first alignment coupler and the second alignment coupler, and generate, based on the detection and on the received light, an electrical signal.
Abstract translation: 一种包括第一光子器件的装置，包括被配置为将第一光从表面的第一位置引导到表面的第二位置的波导管，以及包括被配置为提供第一光的光源的第二光子器件，以及 第一对准耦合器，其光耦合到光源并被配置为在第一位置处光耦合到波导环路;第二对准耦合器，被配置为在第二位置处光耦合到波导环路;以及光电检测器，光耦合到第二对准耦合器 并且被配置为当波导环与第一对准耦合器和第二对准耦合器对准时检测第一光，并且基于检测和接收的光产生电信号。
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Patent Agency Ranking
公开(公告)号：US09417467B2
公开(公告)日：2016-08-16
申请号：US14197301
申请日：2014-03-05
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo
Abstract: System and method embodiments are provided for a thermo-optic switch with thermally isolated and heat restricting pillars. The embodiments enable increased integration density in photonic integrated chips (PICs), reduced power consumption, improved switching speed, and increased chip lifetime. In an embodiment, an optical waveguide; a resistive heater in thermal contact with a surface of the optical waveguide; and a plurality of heat flow restricting pillars connected to the sides of the optical waveguide and supporting the optical waveguide such that the optical waveguide is substantially thermally isolated from a substrate below the optical waveguide by a gap formed between the optical waveguide and the substrate, and wherein the pillars restrict heat flow from the optical waveguide to a supporting structure that supports the pillars.
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7.发明授权Active photonic integrated circuit (PIC) with embedded coupling efficiency monitoring 有权有源光子集成电路（PIC）具有嵌入式耦合效率监控公开(公告)号：US09513447B1
公开(公告)日：2016-12-06
申请号：US14712153
申请日：2015-05-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo , Dominic John Goodwill , Eric Bernier
CPC classification number: G02B6/4225 , G02B6/1225 , G02B6/34 , G02B6/4291
Abstract: An apparatus comprising a first photonic device comprising a waveguide loop configured to guide a first light from a first location of a surface to a second location of the surface, and a second photonic device comprising a light source configured to provide the first light, and a first alignment coupler optically coupled to the light source and configured to optically couple to the waveguide loop at the first location, a second alignment coupler configured to optically couple to the waveguide loop at the second location, and a photodetector optically coupled to the second alignment coupler and configured to detect the first light when the waveguide loop is aligned with the first alignment coupler and the second alignment coupler, and generate, based on the detection and on the received light, an electrical signal.
Abstract translation: 一种包括第一光子器件的装置，包括被配置为将第一光从表面的第一位置引导到表面的第二位置的波导管，以及包括被配置为提供第一光的光源的第二光子器件，以及 第一对准耦合器，其光耦合到光源并被配置为在第一位置处光耦合到波导环路;第二对准耦合器，被配置为在第二位置处光耦合到波导环路;以及光电检测器，光耦合到第二对准耦合器 并且被配置为当波导环与第一对准耦合器和第二对准耦合器对准时检测第一光，并且基于检测和接收的光产生电信号。
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8.发明授权Integrated thermo-optic switch with thermally isolated and heat restricting pillars 有权集成热电开关，具有热隔离和限热支柱公开(公告)号：US09448422B2
公开(公告)日：2016-09-20
申请号：US14197301
申请日：2014-03-05
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo
CPC classification number: G02F1/0147 , G02B6/12 , G02B6/3576 , G02B6/3582 , G02B6/3596 , G02B2006/12038 , G02B2006/12145 , G02F1/225 , G02F2001/212
Abstract: System and method embodiments are provided for a thermo-optic switch with thermally isolated and heat restricting pillars. The embodiments enable increased integration density in photonic integrated chips (PICs), reduced power consumption, improved switching speed, and increased chip lifetime. In an embodiment, an optical waveguide; a resistive heater in thermal contact with a surface of the optical waveguide; and a plurality of heat flow restricting pillars connected to the sides of the optical waveguide and supporting the optical waveguide such that the optical waveguide is substantially thermally isolated from a substrate below the optical waveguide by a gap formed between the optical waveguide and the substrate, and wherein the pillars restrict heat flow from the optical waveguide to a supporting structure that supports the pillars.
Abstract translation: 为具有热隔离和热限制柱的热光开关提供系统和方法实施例。 这些实施例使得能够增加光子集成芯片（PIC）中的集成密度，降低的功耗，提高的开关速度和增加的芯片寿命。 在一个实施例中，光波导; 与所述光波导的表面热接触的电阻加热器; 以及连接到光波导的侧面并支撑光波导的多个热流限制柱，使得光波导通过在光波导和基板之间形成的间隙与光波导下方的基板实质上热隔离，以及 其中支柱限制从光波导到支撑支柱的支撑结构的热流。
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公开(公告)号：US20160062043A1
公开(公告)日：2016-03-03
申请号：US14475145
申请日：2014-09-02
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo
IPC: G02B6/34
CPC classification number: G02B6/34 , G02B6/124 , G02B6/30 , H04B10/40 , H04B10/801 , H04L45/00 , H04L45/62
Abstract: System and method embodiments are provided for high density on-chip optical input/output (I/O) arrays with partition waveguide routing topology. System and apparatus embodiments for on-chip optical I/O arrays provide for doubling the density of optical I/O arrays in a given footprint on a photonic integrated circuit (PIC) chip. System and apparatus embodiments for on-chip optical I/O arrays also provide waveguide routing topology to provide signal feedback to facility automated active alignment and coupling of optical fiber arrays in to surface grating coupler elements without use of waveguide crossings and without intersecting with waveguides connecting devices to I/O ports. In an embodiment, a PIC chip includes a plurality of first optical I/O elements and a plurality of second optical I/O elements, wherein a row of I/O elements comprises alternating ones of the first optical I/O elements and the second optical I/O elements.
Abstract translation: 为具有分区波导路由拓扑的高密度片上光输入/输出（I / O）阵列提供了系统和方法实施例。 用于片上光学I / O阵列的系统和设备实施例提供了在光子集成电路（PIC）芯片上的给定占用空间中将光学I / O阵列的密度加倍。 用于片上光学I / O阵列的系统和装置实施例还提供波导路由拓扑以提供信号反馈以将光纤阵列自动主动对准和耦合到表面光栅耦合器元件中，而不使用波导交叉并且不与波导连接相交 设备到I / O端口。 在一个实施例中，PIC芯片包括多个第一光学I / O元件和多个第二光学I / O元件，其中一行I / O元件包括交替的第一光学I / O元件和第二光学I / 光学I / O元件。
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公开(公告)号：US11480844B2
公开(公告)日：2022-10-25
申请号：US16921096
申请日：2020-07-06
Applicant: Huawei Technologies Co., Ltd.
Inventor： Dritan Celo , Chunhui Zhang , Dominic John Goodwill , Eric Bernier
Abstract: A method and apparatus is provided for control of plural optical phase shifters in an optical device, such as a Mach-Zehnder Interferometer switch. Drive signal magnitude is set using a level setting input and is used for operating both phase shifters, which may have similar characteristics due to co-location and co-manufacture. A device state control signal selects which of the phase shifters receives the drive signal. One or more switches may be used to route the drive signal to the selected phase shifter. Separate level control circuits and state control circuits operating at different speeds may be employed. When the phase shifters are asymmetrically conducting (e.g. carrier injection) phase shifters, a bi-polar drive circuit can be employed. In this case, the phase shifters can be connected in reverse-parallel, and the drive signal polarity can be switchably reversed in order to drive a selected one of the phase shifters.
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