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公开(公告)号:US12267067B2
公开(公告)日:2025-04-01
申请号:US18493098
申请日:2023-10-24
Applicant: Huawei Technologies Co., Ltd.
Inventor: Furong Xiong , Kai Li , Wei Song
Abstract: A transceiver circuit includes a first interface and a second interface that are connected to an optical transceiver device, a receiver circuit, a transmitter circuit, and a compensation circuit. The receiver circuit includes a differential amplifier, where a first phase input terminal of the differential amplifier is coupled to the first interface, and a second phase input terminal of the differential amplifier is coupled to the second interface. The transmitter circuit includes a first transistor, where a terminal of the first transistor is coupled to the second phase input terminal, and another terminal of the first transistor is coupled to a ground terminal. The compensation circuit is configured to provide a leakage path for the first phase input terminal, or provide a compensation current for the second phase input terminal.
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公开(公告)号:US11831304B2
公开(公告)日:2023-11-28
申请号:US17563721
申请日:2021-12-28
Applicant: Huawei Technologies Co., Ltd.
Inventor: Furong Xiong , Kai Li , Wei Song
CPC classification number: H03K17/16 , H04B1/40 , H03F3/45475
Abstract: A transceiver circuit includes a first interface and a second interface that are connected to an optical transceiver device, a receiver circuit, a transmitter circuit, and a compensation circuit. The receiver circuit includes a differential amplifier, where a first phase input terminal of the differential amplifier is coupled to the first interface, and where a second phase input terminal of the differential amplifier is coupled to the second interface. The transmitter circuit includes a first transistor, where a terminal of the first transistor is coupled to the second phase input terminal, and where another terminal of the first transistor is coupled to a ground terminal. The compensation circuit is configured to provide a leakage path for the first phase input terminal, or provide a compensation current for the second phase input terminal.
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公开(公告)号:US20240072789A1
公开(公告)日:2024-02-29
申请号:US18493098
申请日:2023-10-24
Applicant: Huawei Technologies Co., Ltd.
Inventor: Furong Xiong , Kai Li , Wei Song
CPC classification number: H03K17/16 , H04B1/40 , H03F3/45475
Abstract: A transceiver circuit includes a first interface and a second interface that are connected to an optical transceiver device, a receiver circuit, a transmitter circuit, and a compensation circuit. The receiver circuit includes a differential amplifier, where a first phase input terminal of the differential amplifier is coupled to the first interface, and a second phase input terminal of the differential amplifier is coupled to the second interface. The transmitter circuit includes a first transistor, where a terminal of the first transistor is coupled to the second phase input terminal, and another terminal of the first transistor is coupled to a ground terminal. The compensation circuit is configured to provide a leakage path for the first phase input terminal, or provide a compensation current for the second phase input terminal.
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公开(公告)号:US20220123743A1
公开(公告)日:2022-04-21
申请号:US17563721
申请日:2021-12-28
Applicant: Huawei Technologies Co., Ltd.
Inventor: Furong Xiong , Kai Li , Wei Song
Abstract: The invention provides a transceiver circuit including a first interface and a second interface that are connected to an optical transceiver device, a receiver circuit, a transmitter circuit, and a compensation circuit. The receiver circuit includes a differential amplifier, where a first phase input terminal of the differential amplifier is coupled to the first interface, and a second phase input terminal of the differential amplifier is coupled to the second interface. The transmitter circuit includes a first transistor, where a terminal of the first transistor is coupled to the second phase input terminal, and another terminal of the first transistor is coupled to a ground terminal. The compensation circuit is configured to provide a leakage path for the first phase input terminal, or provide a compensation current for the second phase input terminal.
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