公开(公告)号：US20210149804A1

公开(公告)日：2021-05-20

申请号：US17162287

申请日：2021-01-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Hengchao Xin ,  Jing Xia ,  Hongyi Zeng ,  Zhirui Chen

IPC: G06F12/0846 ,  G06F12/02 ,  G06F12/06 ,  G06F13/16

Abstract: A memory interleaving method includes dividing an access capacity into P partial access capacities based on N pieces of configuration information, where the P partial access capacities have a same size, the N pieces of configuration information are of N memory channels, where one of the N pieces of configuration information corresponds to one memory channel of the N memory channels, each of the N configuration information indicates a quantity of first partial access capacities of the P partial access capacities correspond to a first memory channel, and two partial access capacities correspond to a second memory channel, where a total quantity of memory channels is N, and N is an integer greater than or equal to 2, and mapping the P partial access capacities to the N memory channels.