公开(公告)号：US20170337129A1

公开(公告)日：2017-11-23

申请号：US15233601

申请日：2016-08-10

Applicant: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY

Inventor： Hongshi SANG ,  Yinghua GAO ,  Peng HU

IPC: G06F12/06

CPC classification number: G06F12/06 ,  G06F12/0207 ,  G06F17/142 ,  G06F2212/1016

Abstract: The invention discloses a method for generating a row transposed architecture based on a two-dimensional FFT processor, comprising the following characteristic: the FFT processor includes an on-chip row transposition memory for storing an image row transposition result. When the size of the row transposition result exceeds the capacity of the on-chip memory, the first 2k data of a row of the two-dimensional array after row transformation is written into the on-chip row transposition memory, the remaining data is written into the off-chip SDRAM, and k is acquired through calculation according to the row transposition result and the capacity of the on-chip row transposition memory. The on-chip memory is divided into two memories A and B used for storing the row transposition partial result and temporarily storing data read from off-chip SDRAM. When data is read from the memory A or B column by column for FFT column transposition, SDRAM is accessed in a row burst manner and data is written into the empty memory A or B alternately, and finally SDRAM is empty through repetitive ping-pong switching between the memories A and B. The row transposed architecture is capable of substantially reducing cross-line accessing frequency of SDRAM and improving two-dimensional FFT execution speed.

公开(公告)号：US20150062995A1

公开(公告)日：2015-03-05

申请号：US14142987

申请日：2013-12-30

Applicant: Huazhong University of Science and Technology

Inventor： Hongshi SANG ,  Wen WANG ,  Tianxu ZHANG ,  Chaobing LIANG ,  Jing ZHANG ,  Yang XIE ,  Yajing YUAN

IPC: G11C5/00 ,  G11C5/06

CPC classification number: G11C11/4125

Abstract: A radiation-hardened storage unit, including a basic storage unit, a redundant storage unit, and a two-way feedback unit. The basic storage unit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, and a fourth PMOS transistor. The first PMOS transistor and the second PMOS transistor are read-out access transistors. The third PMOS transistor and the fourth PMOS transistor are write-in access transistors. The redundant storage unit includes a fifth PMOS transistor, a sixth PMOS transistor, a seventh PMOS transistor, and an eighth PMOS transistor. The fifth PMOS transistor and the sixth PMOS transistor are read-out access transistors. The seventh PMOS transistor and the eighth PMOS transistor are write-in access transistors. The two-way feedback unit is configured to form a feedback path between the storage node and the redundant storage node.

Abstract translation: 辐射硬化存储单元，包括基本存储单元，冗余存储单元和双向反馈单元。 基本存储单元包括第一PMOS晶体管，第二PMOS晶体管，第三PMOS晶体管和第四PMOS晶体管。 第一PMOS晶体管和第二PMOS晶体管是读出存取晶体管。 第三PMOS晶体管和第四PMOS晶体管是写入存取晶体管。 冗余存储单元包括第五PMOS晶体管，第六PMOS晶体管，第七PMOS晶体管和第八PMOS晶体管。 第五PMOS晶体管和第六PMOS晶体管是读出存取晶体管。 第七PMOS晶体管和第八PMOS晶体管是写入存取晶体管。 双向反馈单元被配置为在存储节点和冗余存储节点之间形成反馈路径。

公开(公告)号：US20150062994A1

公开(公告)日：2015-03-05

申请号：US14135617

申请日：2013-12-20

Applicant: Huazhong University of Science and Technology

Inventor： Hongshi SANG ,  Wen WANG ,  Tianxu ZHANG ,  Chaobing LIANG ,  Jing ZHANG ,  Yang XIE ,  Yajing YUAN

IPC: G11C5/06

CPC classification number: G11C11/4125

Abstract: A radiation-hardened memory storage unit that is resistant to total ionizing done effects, the unit including PMOS transistors.

Abstract translation: 辐射硬化的存储单元，耐整个电离完成效果，该单元包括PMOS晶体管。