公开(公告)号：US08324682B2

公开(公告)日：2012-12-04

申请号：US13030116

申请日：2011-02-17

申请人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Sheng-Fu Yang ,  Chun-Cheng Chen

发明人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Sheng-Fu Yang ,  Chun-Cheng Chen

IPC分类号： H01L29/772

CPC分类号： H01L27/10826 ,  H01L27/10879

摘要： A dynamic random access memory cell having vertical channel transistor includes a semiconductor pillar, a drain layer, an assisted gate, a control gate, a source layer, and a capacitor. The vertical channel transistor has an active region formed by the semiconductor pillar. The drain layer is formed at the bottom of the semiconductor pillar. The assisted gate is formed beside the drain layer, and separated from the drain layer by a first gate dielectric layer. The control gate is formed beside the semiconductor pillar, and separated from the active region by a second gate dielectric layer. The source layer is formed at the top of the semiconductor pillar. The capacitor is formed to electrical connect to the source layer.

摘要翻译： 具有垂直沟道晶体管的动态随机存取存储器单元包括半导体柱，漏极层，辅助栅极，控制栅极，源极层和电容器。 垂直沟道晶体管具有由半导体柱形成的有源区。 漏极层形成在半导体柱的底部。 辅助栅极形成在漏极层旁边，并且通过第一栅极介电层与漏极层分离。 控制栅极形成在半导体柱旁边，并通过第二栅极介电层与有源区分离。 源极层形成在半导体柱的顶部。 电容器形成为电连接到源层。

公开(公告)号：US20120153371A1

公开(公告)日：2012-06-21

申请号：US13030116

申请日：2011-02-17

申请人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Sheng-Fu Yang ,  Chun-Cheng Chen

发明人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Sheng-Fu Yang ,  Chun-Cheng Chen

IPC分类号： H01L27/108

CPC分类号： H01L27/10826 ,  H01L27/10879

摘要： A dynamic random access memory cell having vertical channel transistor includes a semiconductor pillar, a drain layer, an assisted gate, a control gate, a source layer, and a capacitor. The vertical channel transistor has an active region formed by the semiconductor pillar. The drain layer is formed at the bottom of the semiconductor pillar. The assisted gate is formed beside the drain layer, and separated from the drain layer by a first gate dielectric layer. The control gate is formed beside the semiconductor pillar, and separated from the active region by a second gate dielectric layer. The source layer is formed at the top of the semiconductor pillar. The capacitor is formed to electrical connect to the source layer.

摘要翻译： 具有垂直沟道晶体管的动态随机存取存储器单元包括半导体柱，漏极层，辅助栅极，控制栅极，源极层和电容器。 垂直沟道晶体管具有由半导体柱形成的有源区。 漏极层形成在半导体柱的底部。 辅助栅极形成在漏极层旁边，并且通过第一栅极介电层与漏极层分离。 控制栅极形成在半导体柱旁边，并通过第二栅极介电层与有源区分离。 源极层形成在半导体柱的顶部。 电容器形成为电连接到源层。

公开(公告)号：US08441053B2

公开(公告)日：2013-05-14

申请号：US12905100

申请日：2010-10-15

申请人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Chun-Cheng Chen ,  Ching-Ching Tsai ,  Ting-Jyun He ,  Tai-Liang Hsiung

发明人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Chun-Cheng Chen ,  Ching-Ching Tsai ,  Ting-Jyun He ,  Tai-Liang Hsiung

IPC分类号： H01L27/108 ,  H01L29/94 ,  H01L21/70 ,  G11C11/34 ,  G11C7/00

CPC分类号： H01L29/7841 ,  G11C11/404 ,  G11C2211/4016 ,  H01L27/10802 ,  H01L29/749

摘要： A vertical capacitor-less DRAM cell is described, including: a source layer having a first conductivity type, a storage layer disposed on the source layer and having a second conductivity type, an active layer disposed on the storage layer and having the first conductivity type, a drain layer disposed on the active layer and having the second conductivity type, an address gate disposed beside the active layer and separated from the same by a first gate dielectric layer, and a storage gate disposed beside the storage layer and separated from the same by a second gate dielectric layer. The DRAM cell can be written by turning on the MOSFET formed by the storage layer, the active layer, the drain layer, the first gate dielectric layer and the address gate to inject carriers into the storage layer from the active layer.

摘要翻译： 描述了一种垂直无电容器DRAM单元，包括：具有第一导电类型的源极层，设置在源极层上并具有第二导电类型的存储层，设置在存储层上并具有第一导电类型的有源层 ，设置在有源层上并具有第二导电类型的漏极层，位于有源层旁边并与第一栅极介电层分离的地址栅极和设置在存储层旁边并与其分离的存储栅极 通过第二栅极介电层。 可以通过打开由存储层，有源层，漏极层，第一栅极介电层和地址栅极形成的MOSFET来写入DRAM单元，以将载流子从活性层注入到存储层中。

公开(公告)号：US20120092925A1

公开(公告)日：2012-04-19

申请号：US12905100

申请日：2010-10-15

申请人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Chun-Cheng Chen ,  Ching-Ching Tsai ,  Ting-Jyun He ,  Tai-Liang Hsiung

发明人： Hui-Huang Chen ,  Chih-Yuan Chen ,  Chun-Cheng Chen ,  Ching-Ching Tsai ,  Ting-Jyun He ,  Tai-Liang Hsiung

IPC分类号： G11C11/34 ,  H01L27/088 ,  G11C7/00

CPC分类号： H01L29/7841 ,  G11C11/404 ,  G11C2211/4016 ,  H01L27/10802 ,  H01L29/749

摘要： A vertical capacitor-less DRAM cell is described, including: a source layer having a first conductivity type, a storage layer disposed on the source layer and having a second conductivity type, an active layer disposed on the storage layer and having the first conductivity type, a drain layer disposed on the active layer and having the second conductivity type, an address gate disposed beside the active layer and separated from the same by a first gate dielectric layer, and a storage gate disposed beside the storage layer and separated from the same by a second gate dielectric layer. The DRAM cell can be written by turning on the MOSFET formed by the storage layer, the active layer, the drain layer, the first gate dielectric layer and the address gate to inject carriers into the storage layer from the active layer.

摘要翻译： 描述了一种垂直无电容器DRAM单元，包括：具有第一导电类型的源极层，设置在源极层上并具有第二导电类型的存储层，设置在存储层上并具有第一导电类型的有源层 ，设置在有源层上并具有第二导电类型的漏极层，位于有源层旁边并与第一栅极介电层分离的地址栅极和设置在存储层旁边并与其分离的存储栅极 通过第二栅极介电层。 可以通过打开由存储层，有源层，漏极层，第一栅极介电层和地址栅极形成的MOSFET来写入DRAM单元，以将载流子从活性层注入到存储层中。

公开(公告)号：US5547086A

公开(公告)日：1996-08-20

申请号：US438341

申请日：1995-05-10

申请人： Hui-Huang Chen

发明人： Hui-Huang Chen

IPC分类号： A47B81/06 ,  A47F1/12 ,  G11B33/04 ,  A47F7/00

CPC分类号： A47B81/068 ,  A47F1/126 ,  G11B33/0461

摘要： A video compact disk storage rack including a first end member, a second end member, an open frame connected between the first end member and the second end member at the top, two connecting rods bilaterally connected between the first end member and the second end member at the bottom, two expansion springs mounted inside the open frame at two opposite sides, and two T-blocks respectively supported on the expansion springs and moved along two longitudinal sliding slots on the open frame at two opposite sides for holding down video compact disks within the open frame.

摘要翻译： 一种视频光盘存储架，包括第一端构件，第二端构件，连接在第一端构件和顶部的第二端构件之间的开放框架，两个连接杆，其两端连接在第一端构件和第二端构件之间 在底部，两个膨胀弹簧安装在开放框架内的两个相对的两侧，两个T形块分别支撑在膨胀弹簧上并沿开放框架上的两个纵向滑动槽在两个相对侧移动，用于压紧视频光盘 开放框架。

公开(公告)号：US5533630A

公开(公告)日：1996-07-09

申请号：US404611

申请日：1995-03-15

申请人： Hui-Huang Chen

发明人： Hui-Huang Chen

IPC分类号： A47B43/00 ,  A47B81/06 ,  A47F5/01 ,  A47F7/00 ,  G11B33/04

CPC分类号： G11B33/0461 ,  A47B43/00 ,  A47B81/068 ,  A47F5/01 ,  A47F7/0014

摘要： A compact disk assembly rack structure includes two elongated strips, a lower frame, two rods, two support frames and an upper frame as well as a multiplicity of screws. Each of the strips have an upper groove for receiving a longer side of the lower frame which is squeezed through a gap into a circular portion below to be positioned therein. A rod is then fitted into the upper groove of the strip. The support frames each have a clamp for fastening onto a corresponding narrow portion of a shorter side of the lower frame. The upper frame has flat surfaces formed at two shorter sides thereof corresponding to flat surfaces formed at the top of the support frames. Each of the shorter sides of the upper frame is fastened to each of the support frames by screws passing through the flat surfaces of the upper frame into the flat surfaces of the support frames. A number of compact disk racks may be placed one on top of the other for storage or transportation. The compact disk assembly rack may be partly assembled so that the support frames may be folded inwardly to rest in the hollow space of the lower frame, while the upper frame is placed horizontally around the lower frame, achieving the purposes of saving space in storage and transportation.

摘要翻译： 紧凑的盘组件机架结构包括两个细长条，下框架，两个杆，两个支撑框架和上框架以及多个螺钉。 每个条具有用于接收下框架的较长侧的上槽，其通过间隙挤压到下面的圆形部分中以定位在其中。 然后将杆装配到条的上槽中。 支撑框架各自具有用于紧固到下框架的较短侧的相应窄部分上的夹具。 上框架具有形成在其两个短边处的平坦表面，其对应于形成在支撑框架的顶部处的平坦表面。 上框架的每个短边通过穿过上框架的平坦表面的螺钉紧固到每个支撑框架到支撑框架的平坦表面中。 一些紧凑的光盘架可以放置在另一个的顶部以用于存储或运输。 紧凑型盘组件架可以部分地组装，使得支撑框架可以向内折叠以搁置在下框架的中空空间中，同时上框架水平地放置在下框架周围，实现了节省存储空间的目的 运输。

公开(公告)号：US06495430B1

公开(公告)日：2002-12-17

申请号：US10151112

申请日：2002-05-21

申请人： Wen-Bin Tsai ,  Chun-Pei Wu ,  Hui-Huang Chen

发明人： Wen-Bin Tsai ,  Chun-Pei Wu ,  Hui-Huang Chen

IPC分类号： H01L2176

CPC分类号： H01L21/76235

摘要： A process for fabricating a sharp corner-free shallow trench isolation structure. First, a SiON layer and a mask layer are successively formed on a semiconductor substrate. The SiON layer and mask layer are patterned to form an opening, exposing the substrate region on which a shallow trench isolation region will be formed. Next, an oxide spacer is formed on sidewalls of the SiON layer and mask layer. A trench is formed in the semiconductor substrate using the spacer and mask layer as a mask. Next, a liner oxide layer is formed on the surface of the trench by thermal oxidation, such that the liner oxide layer near the SiON layer is in a bird's beak form. An isolating oxide layer is filled in the trench. Finally, the mask layer and SiON layer are removed. The present invention forms a short and thick bird's beak structure and rounded trench corner. Therefore, the thickness of the tunnel oxide is even and the tunnel oxide integrity remains. Thus, the electric current is not accumulated on the trench corner, and parasitic transistors and current leakage can be prevented.

摘要翻译： 一种制造无尖锐的浅沟槽隔离结构的工艺。 首先，在半导体衬底上依次形成SiON层和掩模层。 图案化SiON层和掩模层以形成开口，暴露将在其上形成浅沟槽隔离区的衬底区域。 接下来，在SiON层和掩模层的侧壁上形成氧化物间隔物。 使用间隔物和掩模层作为掩模在半导体衬底中形成沟槽。 接下来，通过热氧化在沟槽的表面上形成衬里氧化物层，使得SiON层附近的衬垫氧化物层呈鸟形。 在沟槽中填充隔离氧化物层。 最后，去除掩模层和SiON层。 本发明形成了一个矮而厚的鸟的喙结构和圆形的沟角。 因此，隧道氧化物的厚度是均匀的，隧道氧化物的完整性保持不变。 因此，电流没有积聚在沟槽角上，并且可以防止寄生晶体管和电流泄漏。