Test circuit, memory system, and test method of memory system
    1.
    发明授权
    Test circuit, memory system, and test method of memory system 有权
    存储系统的测试电路,存储系统和测试方法

    公开(公告)号:US08918685B2

    公开(公告)日:2014-12-23

    申请号:US13603597

    申请日:2012-09-05

    IPC分类号: G11C29/00

    CPC分类号: G11C29/56 G11C2029/5606

    摘要: This technology relates to smoothly performing a test on a memory circuit having a high memory capacity while reducing the size of a test circuit. A test circuit according to the present invention includes a test execution unit configured to perform a test on a target test memory circuit, an internal storage unit configured to store data for the test execution unit, and a conversion setting unit configured to set a part of or the entire storage space of the target test memory circuit as an external storage unit for storing the data for the test execution unit.

    摘要翻译: 该技术涉及在减小测试电路的尺寸的同时平滑地对具有高存储容量的存储器电路进行测试。 根据本发明的测试电路包括被配置为对目标测试存储器电路进行测试的测试执行单元,被配置为存储用于测试执行单元的数据的内部存储单元,以及转换设置单元, 或作为用于存储测试执行单元的数据的外部存储单元的目标测试存储器电路的整个存储空间。