PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD

    公开(公告)号:US20220330426A1

    公开(公告)日:2022-10-13

    申请号:US17702310

    申请日:2022-03-23

    Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer, covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, a first bump formed on the first pad and including a base plating layer and a top plating layer, and a second bump formed on the second conductor pad and including a base plating layer and a top plating layer. The second opening has diameter smaller than diameter of the first opening, the second bump has diameter smaller than diameter of the first bump, the first pad has a first recess formed on the first pad, the second pad has a second recess formed on the second pad, and the first recess is larger than the second recess.

    PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD

    公开(公告)号:US20240268023A1

    公开(公告)日:2024-08-08

    申请号:US18616256

    申请日:2024-03-26

    CPC classification number: H05K1/11 H05K1/09 H05K3/4007 H05K1/18 H05K2201/2081

    Abstract: A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer, covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, bumps including a first bump and a second bump such that the first bump is formed on the first conductor pad of the conductor layer and that the second bump is formed on the second conductor pad of the conductor layer. The second opening has diameter smaller than diameter of the first opening, the second bump has diameter smaller than diameter of the first bump, the first pad has a first recess formed on the first pad, the second pad has a second recess formed on the second pad, and the first recess is larger than the second recess.

    WIRING SUBSTRATE
    3.
    发明公开
    WIRING SUBSTRATE 审中-公开

    公开(公告)号:US20230413429A1

    公开(公告)日:2023-12-21

    申请号:US18325149

    申请日:2023-05-30

    Inventor: Atsushi DEGUCHI

    Abstract: A wiring substrate includes a resin insulating layer, and a conductor layer formed on the resin insulating layer and including a seed layer and a metal film formed on the seed layer such that the conductor layer has wiring patterns including wirings. The conductor layer is formed such that each of the wirings in the wiring patterns has undercut parts on side surfaces extending to the resin insulating layer, and the wirings in the conductor layer include outer wirings formed such that each of the outer wirings has the undercut part on the side surface facing an adjacent one of the wirings is smaller than the undercut part on the side surface farther from the adjacent one of the wirings.

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