Abstract:
A microprogrammed common control unit for effecting the transfer of data between I/O (input/output) devices and the main storage unit of a data processing system, uses both long format control words and short format control words, the short words having half as many bit positions as the long words in the preferred embodiment, thereby minimizing the size of control storage required. Addressing of the control storage unit effects readout of one long word or a pair of short words. Predetermined bits in each control word cause transfer of a first part (half) of the next accessed long word or either one of a next accessed pair of short words to a control register for execution. If a long word has been accessed, one of said bits is effective during execution of the first part of the long word to initiate the transfer of the second word to the control register for execution after the termination of the execution of the first part of the word. Consecutive decode of the first and second portions of a long word permits a smaller control register and substantial sharing of decode circuits by different long format control word fields entered into at least partially corresponding positions of the control register, thereby effecting substantial economies.
Abstract:
An adapter for controlling the operation of chain/train printers employs the main storage of a central processing unit to store characters to be printed and an image of the chain. Two hardware address registers are provided to read out or load the contents of the two storage areas. One register is used to address the character to be printed in the print line area. The second register addresses the character properly aligned with the print position to be printed. The two characters are read out of storage sequentially via a ''''cycle steal'''' technique. Upon acceptance of a cycle steal request, the contents of the first address register is entered into the storage address register, and the proper chain character is read out into the cycle steal register and then transferred to the universal character set register. A second cycle steal is begun by presenting the contents of the second address register to the storage address register. The proper print line character is then read out into the cycle steal register. The two characters are then compared to determine if a print hammer is to be fired.