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    High-speed gating circuit
    1.
    发明授权
    High-speed gating circuit 失效
    高速加热电路

    公开(公告)号：US3648072A

    公开(公告)日：1972-03-07

    申请号：US3648072D

    申请日：1969-02-19

    Applicant: IBM

    Inventor： HARPER LEONARD ROY

    IPC: H03K3/012 ,  H03K17/00 ,  H03K3/12

    CPC classification number: H03K3/012

    Abstract: A gating circuit suitable for operating a circuit such as a bistable multivibrator at high speed wherein a gating transistor has a small capacitor coupled between the base of the transistor and ground. A gating pulse is coupled through a resistor to the base of the gating transistor to temporarily store a charge in the capacitor. A set pulse signal applied in the next instant of time to the emitter of the gating transistor causes the gating transistor to be turned on to produce at the collector of the gating transistor, a current pulse that is sufficient to control the bistable multivibrator circuit.

    Abstract translation: 门控电路适用于高速运行诸如双稳态多谐振荡器的电路，其中门控晶体管具有耦合在晶体管的基极和地之间的小电容器。 门控脉冲通过电阻器耦合到门控晶体管的基极，以暂时将电荷存储在电容器中。 在下一个时刻施加的脉冲信号到门控晶体管的发射极导致门控晶体管导通，在门极晶体管的集电极处产生足以控制双稳态多谐振荡器电路的电流脉冲。

    A central processing unit in which all data flow passes through a single arithmetic and logic unit
    2.
    发明授权
    A central processing unit in which all data flow passes through a single arithmetic and logic unit 失效
    所有数据流通过单个算术和逻辑单元传递的中央处理单元

    公开(公告)号：US3701105A

    公开(公告)日：1972-10-24

    申请号：US3701105D

    申请日：1970-07-24

    Applicant: IBM

    Inventor： FINNEGAN EDWARD D ,  HARPER LEONARD ROY ,  MITROFANOFF NICHOLAS S ,  SLUTMAN ALLEN C

    IPC: G06F15/78 ,  G06F7/00

    CPC classification number: G06F15/7839

    Abstract: A central processing unit which includes an arithmetic and logic unit, local store registers and general registers, allows for the use of the arithmetic and logic unit for housekeeping purposes such as address modification during portions of a machine cycle. The processing unit contains no counters or compare circuits other than the single arithmetic and logic unit with all data flow being through the arithmetic and logic unit.

    Abstract translation: 包括算术和逻辑单元，本地存储寄存器和通用寄存器的中央处理单元允许使用算术和逻辑单元进行内务处理，例如在机器周期的部分期间的地址修改。 处理单元不包含单个算术和逻辑单元以外的计数器或比较电路，所有数据流都通过算术和逻辑单元。

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