公开(公告)号：US3643236A

公开(公告)日：1972-02-15

申请号：US3643236D

申请日：1969-12-19

Applicant: IBM

Inventor： KOLANKOWSKY EUGENE ,  MCMAHON ROBERT F ,  PERLMAN DAVID J

IPC: G11C8/16 ,  G11C15/00

CPC classification number: G11C8/16

Abstract: In a storage array wherein several locations are simultaneously accessed, each location includes a circuit settable to one of two conditions by signals on lines defining its position. Defining the storage position by three lines, ''''horizontal,'''' ''''vertical'''' and ''''diagonal,'''' each circuit may be selected by activating its diagonal line and either the horizontal or vertical line for that circuit. The storage cell is a solid-stage flip-flop with two cross-coupled active devices and additional active device for each of the three driving lines. Connections to each circuit through selected ones of the vertical and horizontal lines communicate information on the inactivated line.

Abstract translation: 在其中几个位置被同时访问的存储阵列中，每个位置包括通过定义其位置的线上的信号可设置为两个状态之一的电路。 可以通过激活其对角线以及该电路的水平线或垂直线来将每个电路定义为“水平”，“垂直”和“对角线”三行的存储位置。 存储单元是具有两个交叉耦合有源器件的固体触发器和用于三个驱动线中的每一个的附加有源器件。 通过所选择的垂直和水平线路连接到每个电路，在灭活的线路上传送信息。

公开(公告)号：US3638199A

公开(公告)日：1972-01-25

申请号：US3638199D

申请日：1969-12-19

Applicant: IBM

Inventor： KOLANKOWSKY EUGENE ,  MCMAHON ROBERT F

IPC: G11C11/41 ,  G11C7/00 ,  G11C11/06 ,  G06F1/00

CPC classification number: G11C11/06035

Abstract: In a data-processing system, a central processing unit and a group of input/output units simultaneously read information from, and write information into, several locations of a single storage unit. The storage is provided with two storage address registers and two data registers. Each storage address register specifies a location in storage with which information in the associated data register is communicated. The storage is an array of storage elements each of which is selected by driving two out of three wires associated with that storage element. Characterizing the three wires as X, Y and Z, each location is accessed by driving the Z-wire for that location and one of the X- or Y-wires. A magnetic core, capable of assuming one of two states in accordance with half select information on two of three wires threaded through it, is disclosed as an example of a storage element. Sense amplifiers, connected to the X- and Y-wires, receive stored information from the undriven wire.

Abstract translation: 在数据处理系统中，中央处理单元和一组输入/输出单元同时从单个存储单元的多个位置读取信息并向其写入信息。 存储器具有两个存储地址寄存器和两个数据寄存器。 每个存储地址寄存器指定在存储器中与相关联的数据寄存器中的信息通信的位置。 存储器是存储元件的阵列，每个存储元件通过驱动与该存储元件相关联的三条线中的两条来选择。 将三条线表征为X，Y和Z，通过驱动该位置的Z线和X线或Y线中的一条来访问每个位置。 作为存储元件的示例，公开了一种能够根据穿过其中的三根电线上的两根上的半选择信息来假设两种状态之一的磁芯。 连接到X和Y线的感应放大器从未驱动的电线接收存储的信息。

公开(公告)号：US3380030A

公开(公告)日：1968-04-23

申请号：US47569165

申请日：1965-07-29

Applicant: IBM

Inventor： MCMAHON ROBERT F

IPC: G06F12/04

CPC classification number: G06F12/04