公开(公告)号：US3643236A

公开(公告)日：1972-02-15

申请号：US3643236D

申请日：1969-12-19

Applicant: IBM

Inventor： KOLANKOWSKY EUGENE ,  MCMAHON ROBERT F ,  PERLMAN DAVID J

IPC: G11C8/16 ,  G11C15/00

CPC classification number: G11C8/16

Abstract: In a storage array wherein several locations are simultaneously accessed, each location includes a circuit settable to one of two conditions by signals on lines defining its position. Defining the storage position by three lines, ''''horizontal,'''' ''''vertical'''' and ''''diagonal,'''' each circuit may be selected by activating its diagonal line and either the horizontal or vertical line for that circuit. The storage cell is a solid-stage flip-flop with two cross-coupled active devices and additional active device for each of the three driving lines. Connections to each circuit through selected ones of the vertical and horizontal lines communicate information on the inactivated line.

Abstract translation: 在其中几个位置被同时访问的存储阵列中，每个位置包括通过定义其位置的线上的信号可设置为两个状态之一的电路。 可以通过激活其对角线以及该电路的水平线或垂直线来将每个电路定义为“水平”，“垂直”和“对角线”三行的存储位置。 存储单元是具有两个交叉耦合有源器件的固体触发器和用于三个驱动线中的每一个的附加有源器件。 通过所选择的垂直和水平线路连接到每个电路，在灭活的线路上传送信息。

公开(公告)号：US3548391A

公开(公告)日：1970-12-15

申请号：US3548391D

申请日：1968-01-15

Applicant: IBM

Inventor： PERLMAN DAVID J

IPC: G11C7/02 ,  G11C11/06 ,  G11C5/02 ,  G11C5/08

CPC classification number: G11C11/06035