公开(公告)号：US20230395561A1

公开(公告)日：2023-12-07

申请号：US18328182

申请日：2023-06-02

Applicant: IMEC VZW

Inventor： Abhitosh Vais ,  Bertrand Paravais ,  Guillaume Boccardi ,  Bernardette Kunert ,  Yves Mols ,  Sachin Yadav

IPC: H01L23/00 ,  H01L29/778 ,  H01L29/737 ,  H01L21/768 ,  H01L21/78

CPC classification number: H01L24/80 ,  H01L29/778 ,  H01L29/737 ,  H01L21/76898 ,  H01L21/78 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: The present disclosure relates to at least one multilayer structure that is produced on a semiconductor donor wafer, by growing e.g. group III-V material in a cavity formed in a dielectric support layer. A template layer embeds the multilayer structure. The multilayer structure comprises a release layer that is accessible from the sides. The method further comprises the production of a device and the production of conductive paths connected to the device and terminating in a number of contact pads which are coplanar with a first dielectric bonding surface. The donor wafer is then bonded to a carrier wafer. TSV openings are then produced from the back side of the carrier wafer and an etchant is provided for selectively removing layers of the multilayer structure. The etchant is supplied through the TSV openings for the removal of the release layer. The donor wafer is thereby released to form separate semiconductor chips.