-
公开(公告)号：US11689209B2
公开(公告)日：2023-06-27
申请号：US17590211
申请日：2022-02-01
IPC分类号： H03M1/06
CPC分类号： H03M1/0604
摘要： An analog-to-digital converter, ADC, circuitry, comprises: an integrator connected to a capacitor, the integrator being configured to switch between integrating an analog input signal for ramping an integrator output and integrating a reference input signal for returning integrator output towards a threshold; a comparator for comparing integrator output to the threshold; and a timer for determining a time duration during which the reference input signal is integrated, the time duration providing a digital representation of an analog input signal value; the ADC circuitry further comprising a feedforward noise shaping loop configured to store a quantization error signal based on digitizing a first sample, the comparator being configured to receive a feedforward noise shaping signal for changing the threshold for digitizing a later sample of the analog input signal following the first sample.
-
公开(公告)号：US11369275B2
公开(公告)日：2022-06-28
申请号：US16709908
申请日：2019-12-10
申请人： IMEC VZW , STICHTING IMEC NEDERLAND
IPC分类号： A61B5/0295 , A61B5/0205 , A61B5/1455 , A61B5/00 , A61B5/024
摘要： A device for read-out of a photoplethysmography (PPG) signal comprises: a photodiode, which is configured to detect a PPG signal, the photodiode comprising a first and a second terminal; and a read-out circuitry for reading out the PPG signal, wherein an input stage is connected to receive a first and a second input signal from the terminals and a DC bias voltage, and wherein the input stage is configured for current sensing to provide a fully differential amplification of the input signals to a first and a second current signal, and wherein an output stage is configured to receive the current signals, wherein the current signals comprise an AC and a DC component of the PPG signal, and wherein the output stage is configured to generate a differential output voltage through a gain component.
-
公开(公告)号：US11350866B2
公开(公告)日：2022-06-07
申请号：US16710132
申请日：2019-12-11
申请人： STICHTING IMEC NEDERLAND , IMEC VZW
发明人： Roland Van Wegberg , Wim Sijbers
摘要： A read-out circuitry for acquiring a multi-channel biopotential signal, comprises: a plurality of read-out signal channels, each receiving an input signal from a unique signal electrode; a reference channel receiving a reference signal from a reference electrode; wherein each read-out signal channel and the reference channel comprises a channel amplifier connected to receive the input signal in a first input node and with an output node connected to a second input node via a channel feedback loop; wherein each signal channel amplifier comprises a capacitor between the second input nodes of the signal channel amplifier and the reference channel amplifier, and wherein each signal channel feedback loop and the reference channel feedback loop comprise a filter.
-
公开(公告)号：US20220015712A1
公开(公告)日：2022-01-20
申请号：US17376543
申请日：2021-07-15
申请人： IMEC VZW , Stichting IMEC Nederland
摘要： The disclosure includes a biosignal monitoring system for reducing a motion artifact from a biopotential electrical signal input, including a signal processing module, a motion artifact extraction module, and a subtraction module. The motion artifact extraction module and the signal processing module receive the biopotential electrical signal input and the subtraction module receives an extracted signal from an output of the motion artifact extraction module and a biopotential electrical signal from an output of the signal processing module. The subtraction module subtracts the extracted signal from the biopotential electrical signal. The motion artifact extraction module is an analog domain electronic circuit and includes a filter network configured for attenuating differential mode signals of the biopotential electrical signal input from a first frequency, and passing the motion artifact signal from the biopotential electrical signal input up to a second frequency at the output of the motion artifact extraction module.
-
公开(公告)号：US20240195445A1
公开(公告)日：2024-06-13
申请号：US18531318
申请日：2023-12-06
发明人： Roland Van Wegberg
CPC分类号： H04B1/1027 , H04B1/16
摘要： Example embodiments relate to methods and systems for processing analog signals. One example method for processing an analog signal includes modulating the analog signal using a chopping signal with a chopping frequency fchop to generate a modulated signal. The method also includes amplifying the modulated signal to generate an amplified signal. Additionally, the method includes low-pass filtering the amplified signal to generate a filtered signal that includes at least one harmonic of the modulated signal. Further, the method includes sub-sampling the filtered signal and performing a correlated double sampling operation by subtracting samples at the chopping frequency.
-
公开(公告)号：US20240192028A1
公开(公告)日：2024-06-13
申请号：US18531008
申请日：2023-12-06
发明人： Roland Van Wegberg
CPC分类号： G01D5/16 , G01R17/105 , G01R33/0029 , H03F3/38 , H03M1/0629 , H03F2200/261
摘要： Example embodiments relate to sensor readout systems and sensor readout methods. One example sensor readout system includes a signal generator configured to generate a biasing signal. The sensor readout system also includes a first chopper configured to modulate the biasing signal using a chopping signal with a chopping frequency fchop to generate a modulated biasing signal. Additionally, the sensor readout system includes a Wheatstone bridge circuit that includes resistive branches. At least one of the resistive branches includes an impedance-based sensor. The Wheatstone bridge circuit is configured to receive the modulated biasing signal and to generate a sensing signal based on the modulated biasing signal. Further, the sensor readout system includes a second chopper configured to modulate the sensing signal using the chopping signal with the chopping frequency fchop to generate a modulated sensing signal.
-
公开(公告)号：US10686464B2
公开(公告)日：2020-06-16
申请号：US16507875
申请日：2019-07-10
发明人： Roland Van Wegberg
摘要： A latched comparator comprises a pre-amplifier stage with a positive input (Vin,p), a negative input (Vin,n); and a differential output (ΔVout) comprising a first output (Vout,1) and a second output (Vout,2), the pre-amplifier stage comprising a first cascode pair, comprising a first amplifying transistor (MN2) and a first cascode transistor (MN4) connected at a first cascode node, the first amplifying transistor (MN2) being controlled by the positive input (Vin,p) and the first cascode transistor (MN4) being connected, opposite to the first cascode node, to the first output (Vout,1); a second cascode pair, comprising a second amplifying transistor (MN3) and a second cascode transistor (MN5) connected at a second cascode node, the second amplifying transistor (MN3) being controlled by the negative input (Vin,n) and the second cascode transistor (MN5) being connected, opposite to the second cascode node, to the second output (Vout,2); a first gain-boosting transistor (MN6) connected between the first output (Vout,1) and the first cascode node; and a second gain-boosting transistor (MN7) connected between the second output (Vout,2) and the second cascode node, wherein the first gain-boosting transistor (MN6) and the second gain-boosting transistor (MN7) are cross-coupled, so that the first gain-boosting transistor (MN6) is controlled by the second output (Vout,2) and the second gain-boosting transistor (MN7) is controlled by the first output (Vout,2).
-
-
-
-
-
-
搜索结果
7 条记录 (耗时 0.016 秒)
