公开(公告)号：US09105318B2

公开(公告)日：2015-08-11

申请号：US14062560

申请日：2013-10-24

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Chih-Yu Chang ,  Wei-Zheng Lu ,  Fu-Chiang Jan

IPC: G11C7/00 ,  G11C7/10 ,  G11C7/22

CPC classification number: G11C7/1066 ,  G11C7/1075 ,  G11C7/1093 ,  G11C7/22

Abstract: A memory device operable to provide multi-port functionality, which may comprise a single-port memory having a first operating frequency that is at least twice of a second operation frequency of a multi-port memory, a read synchronization module that synchronizes a set of read signals from the second operation frequency to the first operating frequency, a write synchronization module that synchronizes a set of write signals from the second operation frequency to the first operating frequency, a read/write signal selector that integrates a set of synchronized read signals and a set of synchronized write signals into a set of input control signals of the single-port memory, and a read out data synchronization module configured to synchronize a set of read out data from the single-port memory with the second operation frequency of the multi-port memory.

Abstract translation: 一种可操作以提供多端口功能的存储设备，其可以包括具有至少是多端口存储器的第二操作频率的两倍的第一工作频率的单端口存储器，同步一组 从第二操作频率读取信号到第一操作频率;同步来自第二操作频率的写入信号与第一操作频率的写入同步模块;将一组同步读取信号和 将一组同步的写信号转换为单端口存储器的一组输入控制信号;以及读出数据同步模块，被配置为使来自单端口存储器的一组读出数据与多端口存储器的第二操作频率同步 -port记忆。

公开(公告)号：US20140088425A1

公开(公告)日：2014-03-27

申请号：US13720400

申请日：2012-12-19

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Song-Nien Tang ,  Fu-Chiang Jan ,  Kun-Ta Wu ,  Guo-Zua WU

IPC: A61B8/00 ,  A61B8/08 ,  A61B8/14

CPC classification number: A61B8/4472 ,  A61B8/14 ,  A61B8/461 ,  A61B8/5207 ,  A61B8/54 ,  A61B8/56

Abstract: A single chip includes an analog module, an ultrasound imaging module, a wireless network module, a switch circuit and a central processing unit (CPU). The ultrasound imaging module controls an ultrasound front end, and the wireless network module controls a radio-frequency (RF) front end. The CPU controls the switch circuit to electrically connect the analog module to the ultrasound imaging circuit or the wireless network module.

Abstract translation: 单个芯片包括模拟模块，超声成像模块，无线网络模块，开关电路和中央处理单元（CPU）。 超声波成像模块控制超声前端，无线网络模块控制射频（RF）前端。 CPU控制开关电路将模拟模块电连接到超声波成像电路或无线网络模块。