公开(公告)号：US08872543B2

公开(公告)日：2014-10-28

申请号：US13872168

申请日：2013-04-29

Applicant: Industrial Technology Research Institute

Inventor： Wen-Pin Lin ,  Chih-He Lin ,  Shyh-Shyuan Sheu ,  Hsin-Chi Lai

IPC: H03K19/173 ,  G06F7/38 ,  H03K19/177

CPC classification number: H03K19/1776

Abstract: A configurable logic block (CLB) and an operation method of the CLB are provided. The CLB includes memory units and a selecting circuit. The memory unit includes a first resistive non-volatile memory (RNVM) element and a second RNVM element. Top electrodes (TEs) of the first and second RNVM elements are coupled to an output terminal of the memory unit. Bottom electrodes (BEs) of the first and second RNVM elements are respectively coupled to a first bias terminal and a second bias terminal of the memory unit. The selecting circuit selects one of the memory units according to an input logic value and determines an output logic value of the CLB according to an output logic value of the selected memory unit.

Abstract translation: 提供了可配置逻辑块（CLB）和CLB的操作方法。 CLB包括存储单元和选择电路。 存储单元包括第一电阻性非易失性存储器（RNVM）元件和第二RNVM元件。 第一和第二RNVM元件的顶部电极（TE）耦合到存储器单元的输出端子。 第一和第二RNVM元件的底部电极（BE）分别耦合到存储器单元的第一偏置端子和第二偏置端子。 选择电路根据输入逻辑值选择一个存储器单元，并根据所选存储器单元的输出逻辑值确定CLB的输出逻辑值。

公开(公告)号：US20140210514A1

公开(公告)日：2014-07-31

申请号：US13872168

申请日：2013-04-29

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Wen-Pin Lin ,  Chih-He Lin ,  Shyh-Shyuan Sheu ,  Hsin-Chi Lai

IPC: H03K19/177

CPC classification number: H03K19/1776

Abstract: A configurable logic block (CLB) and an operation method of the CLB are provided. The CLB includes memory units and a selecting circuit. The memory unit includes a first resistive non-volatile memory (RNVM) element and a second RNVM element. Top electrodes (TEs) of the first and second RNVM elements are coupled to an output terminal of the memory unit. Bottom electrodes (BEs) of the first and second RNVM elements are respectively coupled to a first bias terminal and a second bias terminal of the memory unit. The selecting circuit selects one of the memory units according to an input logic value and determines an output logic value of the CLB according to an output logic value of the selected memory unit.

Abstract translation: 提供了可配置逻辑块（CLB）和CLB的操作方法。 CLB包括存储单元和选择电路。 存储单元包括第一电阻性非易失性存储器（RNVM）元件和第二RNVM元件。 第一和第二RNVM元件的顶部电极（TE）耦合到存储器单元的输出端子。 第一和第二RNVM元件的底部电极（BE）分别耦合到存储器单元的第一偏置端子和第二偏置端子。 选择电路根据输入逻辑值选择一个存储器单元，并根据所选存储器单元的输出逻辑值确定CLB的输出逻辑值。