公开(公告)号：US20170052114A1

公开(公告)日：2017-02-23

申请号：US14831248

申请日：2015-08-20

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Ding-Zheng LIN ,  Yi-Ping CHEN ,  Ping-Chen CHEN

IPC: G01N21/552

CPC classification number: G01N21/554 ,  B82Y20/00 ,  G01N21/658 ,  Y10S977/954

Abstract: A sensing chip is provided, which includes a substrate and a plurality of nano structures periodically arranged on the substrate, wherein each of the nano structures includes a bottom metal layer disposed on the substrate, a middle dielectric layer disposed on the bottom metal layer, and a top metal layer disposed on the middle dielectric layer. The bottom metal layer has an area that is larger than that of the top metal layer.

Abstract translation: 提供一种感测芯片，其包括基板和周期性地布置在基板上的多个纳米结构，其中每个纳米结构包括设置在基板上的底部金属层，设置在底部金属层上的中间介电层，以及 设置在中间介电层上的顶层金属层。 底部金属层的面积大于顶部金属层的面积。