公开(公告)号：US20220223202A1

公开(公告)日：2022-07-14

申请号：US17322509

申请日：2021-05-17

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Chih-Sheng LIN ,  Sih-Han LI ,  Yu-Hui LIN ,  Jian-Wei SU

IPC: G11C13/00 ,  G11C7/06

Abstract: A memory device for in-memory computation includes data channels, a memory cell array, a maximum accumulated weight generating array, a minimum accumulated weight generating array, a reference generator and a comparator. The data channels are selectively enabled according to data input. The memory cell array generates an accumulated data weight value according to the quantity of enabled data channels, a first resistance and a second resistance. The maximum accumulated weight generating array generates a maximum accumulated weight value according to the quantity of enabled data channels and the first resistance. The minimum accumulated weight generating array generates a minimum accumulated weight value according to the quantity of enabled data channels and the second resistance. The reference generator generates reference value(s) according to the maximum and minimum accumulated weight values. The comparator compares the accumulated data weight value with the reference value(s) to generate a data weight state.