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公开(公告)号：US20160353289A1
公开(公告)日：2016-12-01
申请号：US15165434
申请日：2016-05-26
发明人： Jin Soup JOUNG , Yong Hoon LIM , Kyoung Hwan JU
CPC分类号： H04W16/22 , H04B17/13 , H04B17/21 , H04B17/3912 , H04L41/0806 , H04L41/142 , H04L43/0829 , H04W24/02
摘要： A calibration method for a channel simulator is applied to a large-capacity channel simulator having the interfaces of P base stations and Q terminals so that path loss calibration for P×Q paths is more rapidly and easily performed.
摘要翻译： 将通道模拟器的校准方法应用于具有P基站和Q端子的接口的大容量信道模拟器，使得P×Q路径的路径损耗校准更快速且容易地执行。
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公开(公告)号：US20230037910A1
公开(公告)日：2023-02-09
申请号：US17970658
申请日：2022-10-21
发明人： Young Su KWAK , Kyoung Hwan JU
IPC分类号： G01R23/173 , G01R23/167
摘要： A spectrum analyzer having a memory function to adopt a digital-data-based frequency sweep scheme while achieving performance comparable to performance of a high-speed FFT spectrum analyzer, and a method of controlling the spectrum analyzer, in which the spectrum analyzer includes: an ADC for converting a BWP signal, which is at least one analog unit frequency band signal, into a digital data sample at a predetermined sample rate according to a span set by a user; a digital sweep part for sweeping the data sample passed through the ADC while digitally decimating the data sample through a decimation processing block having a two-stage cascaded structure, and processing the swept data sample to increase a frequency sweep speed; and a control unit for controlling the digital sweep part according to various items input, set, and selected by the user to perform spectrum analysis and output a spectrum analysis result.
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公开(公告)号：US20170237585A1
公开(公告)日：2017-08-17
申请号：US15416481
申请日：2017-01-26
发明人： Jin Soup JOUNG , Joo Hyeong LEE , Yong Hoon LIM , Kyoung Hwan JU
CPC分类号： H04L25/0238 , H04B1/707 , H04J13/0044 , H04L25/0204
摘要： Provided is a method of blindly estimating WCDMA OVSF of a signal analyzer, which includes: (a) setting SF to 512 and an index thereof to 0; (b) calculating a power average value of a symbol obtained by despreading descrambled data with an OVSF code set by increasing the index from ‘0’ by ‘1’; (c) determining an OVSF code by which the power average value is equal to or greater than a power reference value as a used OVSF code candidate and determining an OVSF code by which the power average value is less than the power reference value as an unused OVSF code; (d) comparing a zero crossing rate of a symbol with a reference value to determine whether the OVSF code candidate is the used OVSF code; and (e) repeating (b) to (d) while reducing the SF half by half until the SF is equal to 4.
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4.发明申请公开(公告)号：US20180213419A1
公开(公告)日：2018-07-26
申请号：US15625364
申请日：2017-06-16
发明人： Jin Soup JOUNG , Joo Hyeong LEE , Yong Hoon LIM , Kyoung Hwan JU
IPC分类号： H04W24/06 , H04B17/391 , H04L5/00 , H04W72/08
CPC分类号： H04W24/06 , H04B17/3911 , H04B17/3912 , H04L5/001 , H04L5/0037 , H04W72/085
摘要： Provided is a channel simulator having a function of supporting a carrier aggregation and a carrier aggregation block used for the same to support a carrier aggregation function at a minimum path loss without reducing the number of valid connectable terminals. The channel simulator includes: a terminal interface block connected to each of at least four terminals through at least two transmission/reception ports; a carrier aggregation block including unit modules each including one RF coupler and one RF switch, and interposed between the terminal interface block and the terminal to support the carrier aggregation for one to four component carriers; and a management server. The carrier aggregation block includes a front-end carrier aggregation unit and a rear-end carrier aggregation unit.
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公开(公告)号：US20170188313A1
公开(公告)日：2017-06-29
申请号：US15391282
申请日：2016-12-27
发明人： Jin Soup JOUNG , Joo Hyeong LEE , Yong Hoon LIM , Kyoung Hwan JU
CPC分类号： H04W52/242 , H04B17/3911 , H04B17/3912 , H04W24/06 , H04W52/146 , H04W52/52
摘要： Provided is a control method for a channel simulator, capable of expanding a processable dynamic range of an uplink signal receiving unit while adopting an A/D converter (ADC) having low resolution by adjusting an attenuation amount of the uplink signal receiving unit in a large-capacity channel simulator having P base stations and Q terminal interfaces. In a control method for a channel simulator that includes P base station interface cards (BS I/F cards) (P>2; P is an integer), a link processor block, and Q user equipment interface cards (UE I/F cards) (Q>2; Q is an integer) to form channels with respect to all paths between P base stations and Q terminals, the control method for the channel simulator according to the present invention includes: (a) establishing a table representing an attenuation amount offset in an uplink signal receiving unit of the UE I/F card over a path loss based on log data with respect to terminal transmission power over the path loss for eliminating change of the path loss exerting an influence upon the terminal transmission power; (b) searching for a specified path loss value from the table established in step (a) to determine an attenuation amount corresponding to the specified path loss value when a path loss value with respect to an uplink signal processing process is specified; and (c) adjusting an attenuation amount in the uplink signal receiving unit of the UE I/F card based on the attenuation amount determined in step (b).
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公开(公告)号：US20200379024A1
公开(公告)日：2020-12-03
申请号：US16871664
申请日：2020-05-11
发明人： Young Su KWAK , Kyoung Hwan JU
IPC分类号： G01R23/173 , G01R23/167
摘要： A spectrum analyzer having a memory function to adopt a digital-data-based frequency sweep scheme while achieving performance comparable to performance of a high-speed FFT spectrum analyzer, and a method of controlling the spectrum analyzer, in which the spectrum analyzer includes: an ADC for converting a BWP signal, which is at least one analog unit frequency band signal, into a digital data sample at a predetermined sample rate according to a span set by a user; a digital sweep part for sweeping the data sample passed through the ADC while digitally decimating the data sample through a decimation processing block having a two-stage cascaded structure, and processing the swept data sample to increase a frequency sweep speed; and a control unit for controlling the digital sweep part according to various items input, set, and selected by the user to perform spectrum analysis and output a spectrum analysis result.
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公开(公告)号：US20170237597A1
公开(公告)日：2017-08-17
申请号：US15050078
申请日：2016-02-22
发明人： Jin Soup JOUNG , Joo Hyeong LEE , Yong Hoon LIM , Kyoung Hwan JU
IPC分类号： H04L27/26 , H04B1/7087 , H04L5/00
CPC分类号： H04L27/2656 , H04B1/7073 , H04B1/7087 , H04L5/0021 , H04L27/2672 , H04L27/2675
摘要： Provided is a method of processing a WCDMA signal timing offset for a signal analyzer. The method includes estimating an integer multiple timing offset of WCDMA baseband sample data corresponding to an amount of at least one frame; generating a frequency domain signal which is time delayed corresponding to a fractional timing offset estimation resolution after generating the frequency domain signal by performing an FFT calculation on an already-known reference signal; converting each time-delayed frequency domain signal into a time domain signal by performing an IFFT calculation on each time-delayed frequency domain signal and calculating a correlation between an input signal from a position of the integer multiple timing offset and the time domain signal; and estimating a delay time leading to a maximum correlation as a fractional timing offset.
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