公开(公告)号：US09348539B1

公开(公告)日：2016-05-24

申请号：US14194416

申请日：2014-02-28

Applicant: INPHI CORPORATION

Inventor： Nirmal Raj Saxena ,  David Wang ,  Christopher Haywood ,  Eric McDonald ,  Chao Xu

IPC: G06F3/06

CPC classification number: G11C11/005 ,  G11C5/04

Abstract: A hybrid memory system. This system can include a processor coupled to a hybrid memory buffer (HMB) that is coupled to a plurality of DRAM and a plurality of Flash memory modules. The HMB module can include a Memory Storage Controller (MSC) module and a Near-Memory-Processing (NMP) module coupled by a SerDes (Serializer/Deserializer) interface. This system can utilize a hybrid (mixed-memory type) memory system architecture suitable for supporting low-latency DRAM devices and low-cost NAND flash devices within the same memory sub-system for an industry-standard computer system.

Abstract translation: 混合存储器系统。 该系统可以包括耦合到耦合到多个DRAM和多个闪存模块的混合存储器缓冲器（HMB）的处理器。 HMB模块可以包括由SerDes（串行器/解串器）接口耦合的存储器存储控制器（MSC）模块和近端存储器处理（NMP）模块。 该系统可以利用混合（混合存储器型）存储器系统架构，其适用于在用于工业标准计算机系统的相同存储器子系统中支持低延迟DRAM设备和低成本NAND闪存器件。