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1.发明授权公开(公告)号：US10606306B2
公开(公告)日：2020-03-31
申请号：US16263705
申请日：2019-01-31
Applicant: INPHI CORPORATION
Inventor： Tomas Alexander Dusatko
Abstract: A method and circuit are provided to reduce power consumption of high-speed clocks that are distributed across an integrated circuit (IC). Example implementations seek to reduce the amount of power dissipated in typical clock distribution networks by turning the combination of a multi-port electrical network and transmission line into a multi-resonant structure. In an implementation, the multi-port electrical network is coupled between first and second segments of the transmission line. The multi-port electrical network includes series and shunt reactive circuit elements, such as series inductive reactance and a shunt inductive susceptance, configured to produce first and second resonances that cooperate to create a bandpass response across clock distribution frequencies. This bandpass response is created by the multi-resonant structure, which is a combination of the transmission line and the multi-port electrical network. Various implementations are provided, including single-ended, differential, multi-section, multi-output, and point-to-multi-point implementations, each with an optional low-speed mode switch.
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2.发明授权公开(公告)号：US10234892B2
公开(公告)日：2019-03-19
申请号：US15910875
申请日：2018-03-02
Applicant: INPHI CORPORATION
Inventor： Tomas Alexander Dusatko
Abstract: A method and circuit are provided to reduce power consumption of high-speed clocks that are distributed across an integrated circuit (IC). Example implementations seek to reduce the amount of power dissipated in typical clock distribution networks by turning the combination of a multi-port electrical network and transmission line into a multi-resonant structure. In an implementation, the multi-port electrical network is coupled between first and second segments of the transmission line. The multi-port electrical network includes series and shunt reactive circuit elements, such as series inductive reactance and a shunt inductive susceptance, configured to produce first and second resonances that cooperate to create a bandpass response across clock distribution frequencies. This bandpass response is created by the multi-resonant structure, which is a combination of the transmission line and the multi-port electrical network. Various implementations are provided, including single-ended, differential, multi-section, multi-output, and point-to-multi-point implementations, each with an optional low-speed mode switch.
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公开(公告)号：US09939841B1
公开(公告)日：2018-04-10
申请号：US15403041
申请日：2017-01-10
Applicant: INPHI CORPORATION
Inventor： Tomas Alexander Dusatko
CPC classification number: G06F1/10 , H01F17/0006 , H01L23/66 , H01L2223/6627 , H03H7/0123 , H03H7/09 , H03H7/383 , H03H11/28
Abstract: A method and circuit are provided to reduce the power consumption of high-speed clocks that are distributed across an integrated circuit (IC). Example implementations seek to reduce the amount of power dissipated in typical clock distribution networks by turning the combination of a multi-port electrical network and transmission line into a multi-resonant structure. In an implementation, the multi-port electrical network is coupled between first and second segments of the transmission line. The multi-port electrical network includes a series inductive reactance and a shunt inductive susceptance configured to produce first and second resonances that cooperate to create a bandpass response across clock distribution frequencies. This bandpass response is created by the multi-resonant structure, which is a combination of the transmission line and the multi-port electrical network. Various implementations are provided, including single-ended, differential, multi-section, multi-output, and point-to-multi-point implementations, each with an optional low-speed mode switch.
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