公开(公告)号：US20220129205A1

公开(公告)日：2022-04-28

申请号：US17568956

申请日：2022-01-05

Applicant: INTEL CORPORATION

Inventor： Zhi Yong CHEN ,  Zhiqiang QIN ,  Xueyan WANG ,  Fang YUAN

IPC: G06F3/06

Abstract: Logic may store data structures for two or more processors in memory such as cache, system management memory, protected memory, or other memory. Logic may compress the data structures to be stored in the memory. Logic may determine a reference data structure, store the reference data structure in the memory, determine a difference between a data structure for a second processor and the reference data structure, and store the difference in the memory. Logic may store the difference in the memory within a data structure such as a linked list or a bitmap. Logic may decompress the difference by combining the difference with the reference data structure. Logic may expand the useable data region to include cache in the two or more processors. Logic may instruct two or more processors to store their processor data structures in their respective caches and perform initialization with the processor data structures.

公开(公告)号：US20190020393A1

公开(公告)日：2019-01-17

申请号：US16080027

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Fang YUAN

IPC: H04B7/06 ,  H04B7/0456

Abstract: A communication device and a method for determining an information from a second device consisting of setting an initial beamforming pattern, wherein the initial beamforming pattern comprises a beamforming direction and a corresponding beamforming area for each of the plurality of antenna ports, comprising determining a concerned direction interval based on overlapping beamforming areas of adjacent pairs of the plurality of antenna ports; receiving a signal from the second device; measuring a signal gain from the signal on each of the plurality of antenna ports; determining which concerned direction interval the second device occupies based on an antenna port having the highest signal gain and on one of the adjacent pair of antenna ports to the antenna port having the highest signal gain having a higher signal gain; and determining the information from the second device based on the determined concerned direction interval.

公开(公告)号：US20200218471A1

公开(公告)日：2020-07-09

申请号：US16638694

申请日：2017-09-25

Applicant: INTEL CORPORATION

Inventor： Zhi Yong CHEN ,  Zhiqiang QIN ,  Xueyan WANG ,  Fang YUAN

IPC: G06F3/06

Abstract: Logic may store data structures for two or more processors in memory such as cache, system management memory, protected memory, or other memory. Logic may compress the data structures to be stored in the memory. Logic may determine a reference data structure, store the reference data structure in the memory, determine a difference between a data structure for a second processor and the reference data structure, and store the difference in the memory. Logic may store the difference in the memory within a data structure such as a linked list or a bitmap. Logic may decompress the difference by combining the difference with the reference data structure. Logic may expand the useable data region to include cache in the two or more processors. Logic may instruct two or more processors to store their processor data structures in their respective caches and perform initialization with the processor data structures.

公开(公告)号：US20190052340A1

公开(公告)日：2019-02-14

申请号：US16080025

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Fang YUAN

IPC: H04B7/08 ,  H04L25/02 ,  H04B7/06 ,  H04B17/336 ,  H04B17/364 ,  H04L5/00

Abstract: A communication device and a method for Orthogonal Frequency Division Multiplexing (OFDM) configured to receive a signal from a second device; perform a channel estimation on the signal, wherein the channel estimation comprises determining a channel path gain, a channel path delay, and at least one of a channel path angle of arrival (AoA) or a channel path angle of departure (AoD); determine an optimal analog beamforming direction based on the channel estimation; and communicating the data using the analog beamforming.