公开(公告)号：US20170011793A1

公开(公告)日：2017-01-12

申请号：US15115464

申请日：2014-03-05

Applicant: INTEL CORPORATION

Inventor： Gururaj K. SHAMANNA ,  Stefan RUSU ,  Eric A. KARL ,  Zheng GUO

IPC: G11C11/419

CPC classification number: G11C11/419 ,  G11C7/04 ,  G11C7/22 ,  G11C29/021 ,  G11C29/028

Abstract: Described is an apparatus which comprises: a memory; a first power supply node to receive a first power supply; a second power supply node coupled to the memory to provide the memory with second power supply; a circuit coupled to the first and second power supply nodes, the circuit operable to dynamically modulate droop in the second power supply by adaptively adjusting signal characteristics of a write assist pulse.

Abstract translation: 描述了一种装置，包括：存储器; 第一电源节点，用于接收第一电源; 耦合到所述存储器以向所述存储器提供第二电源的第二电源节点; 耦合到所述第一和第二电源节点的电路，所述电路可操作以通过自适应地调整写入辅助脉冲的信号特性来动态地调制所述第二电源中的下降。