公开(公告)号：US10445092B2

公开(公告)日：2019-10-15

申请号：US14583644

申请日：2014-12-27

Applicant: INTEL CORPORATION

Inventor： Jesus Corbal San Adrian ,  Elmoustapha Ould-Ahmed-Vall ,  Robert Valentine ,  Mark J. Charney ,  Milind B. Girkar ,  Bret L. Toll ,  Roger Espasa ,  Guillem Sole ,  Jairo Balart ,  Brian Hickman

IPC: G06F9/30 ,  G06F16/901 ,  G06F15/80 ,  G06F7/76

Abstract: A processor for performing a vector permute comprises: a source vector register to store a plurality of source data elements; a destination vector register to store a plurality of destination data elements; a control vector register to store a plurality of control data elements, each control data element corresponding to one of the destination data elements and including an N bit value indicating whether a source data element is to be copied to the corresponding destination data element; vector permute logic to compare the N bit value of each control data element to an N bit portion of an immediate to determine whether to copy a source data element to the corresponding destination data element, wherein if the N bit values match, then the vector permute logic is to identify a source data element using an index value included in the control data element.