公开(公告)号：US11069795B2

公开(公告)日：2021-07-20

申请号：US16636206

申请日：2017-09-28

Applicant: INTEL CORPORATION

Inventor： Karthik Jambunathan ,  Glenn A. Glass ,  Anand S. Murthy ,  Jun Sung Kang ,  Bruce E. Beattie ,  Anupama Bowonder ,  Biswajeet Guha ,  Ju H. Nam ,  Tahir Ghani

IPC: H01L21/8234 ,  H01L27/088 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: Integrated circuits include fins including an upper/channel region and a lower/sub-channel region, the lower region having a first chemical composition and opposing sidewalls adjacent to an insulator material, and the upper region having a second chemical composition. A first width indicates the distance between the opposing sidewalls of the lower region at a first location is at least 1 nm wider than a second width indicating the distance between the opposing sidewalls of the upper region at a second location, the first location being within 10 nm of the second location (or otherwise relatively close to one another). The first chemical composition is distinct from the second chemical composition and includes a surface chemical composition at an outer surface of the opposing sidewalls of the lower region and a bulk chemical composition therebetween, the surface chemical composition including one or more of oxygen, nitrogen, carbon, chlorine, fluorine, and sulfur.

公开(公告)号：US11056592B2

公开(公告)日：2021-07-06

申请号：US16611920

申请日：2017-06-30

Applicant: INTEL CORPORATION

Inventor： Karthik Jambunathan ,  Cory C. Bomberger ,  Glenn A. Glass ,  Anand S. Murthy ,  Ju H. Nam ,  Tahir Ghani

IPC: H01L29/78 ,  H01L27/092

Abstract: An integrated circuit (IC) includes a substrate that includes silicon. A first layer is on the substrate and includes a first monocrystalline semiconductor material, the first layer having a plurality of defects. A second layer is on the first layer and includes a second monocrystalline semiconductor material that includes germanium. A strained channel structure is above the first layer. A gate structure is at least above the channel structure. A source region is adjacent the channel structure. A drain region is adjacent the channel structure, such that the channel structure is laterally between the source region and the drain region.