公开(公告)号：US20240320782A1

公开(公告)日：2024-09-26

申请号：US18126401

申请日：2023-03-25

Applicant: Intel Corporation

Inventor： Lorenzo TESSARI

IPC: G06T1/60 ,  G06T1/20

CPC classification number: G06T1/60 ,  G06T1/20

Abstract: Apparatus and method for density-aware stochastic subsets for improved importance sampling. For example, one embodiment of an apparatus comprises: a sampling weight generator to determine a plurality of sampling weights associated with a corresponding plurality of input primitives, the sampling weight generator to determine each sampling weight based on a surface area or diagonal of a bounding box of the corresponding input primitive and a plurality of distance values corresponding to distances between the input primitive and a corresponding plurality of neighboring input primitives; a sampler to identify a representative subset of the input primitives based, at least in part, on the plurality of sampling weights; bounding volume hierarchy (BVH) builder hardware logic to construct an approximate BVH based on the representative subset of input primitives; hardware logic to insert input primitives not in the representative subset into leaves of the approximate BVH; and the BVH builder or a different BVH builder to construct a final BVH based on the primitives inserted into the leaves of the approximate BVH.

公开(公告)号：US20230377267A1

公开(公告)日：2023-11-23

申请号：US17852216

申请日：2022-06-28

Applicant: Intel Corporation

Inventor： Lorenzo TESSARI ,  Addis DITTEBRANDT ,  Michael DOYLE ,  Carsten BENTHIN

IPC: G06T17/20 ,  G06T15/00 ,  G06T15/06 ,  G06T1/20

CPC classification number: G06T17/20 ,  G06T15/005 ,  G06T15/06 ,  G06T1/20

Abstract: A method and apparatus for efficiently constructing a bounding volume hierarchy (BVH). For example, one embodiment of an apparatus comprises: a primitive sampler to identify a representative subset of input primitives of a graphics scene; bounding volume hierarchy (BVH) builder hardware logic to construct an approximate BVH based on the representative subset of input primitives; hardware logic to insert input primitives not in the representative subset into leaves of the approximate BVH; and the BVH builder or a different BVH builder to construct a final BVH based on the primitives inserted into the leaves of the approximate BVH.

公开(公告)号：US20230350641A1

公开(公告)日：2023-11-02

申请号：US17699063

申请日：2022-03-18

Applicant: INTEL CORPORATION

Inventor： Lorenzo TESSARI ,  Michael DOYLE

IPC: G06F7/58

CPC classification number: G06F7/582

Abstract: Apparatus and method for generating a quasi-random sequence. For example, one embodiment of an apparatus comprises: a graphics processor comprising execution resources to execute graphics instructions; and quasi-random sequence generation logic implemented, at least in part, in program code executed by an execution unit, the quasi-random sequence generation logic to generate a Sobol number sequence to be used by the graphics processor for rendering operations, the Sobol sequence generator to perform the operations of: generating white noise bits; mixing the white noise bits with Sobol bits to generate a quasi-random result sequence.