公开(公告)号：US20160233298A1

公开(公告)日：2016-08-11

申请号：US15024750

申请日：2013-12-19

Applicant: INTEL CORPORATION

Inventor： Milton C. WEBB ,  Mark BOHR ,  Tahir GHANI ,  Szuya S. LIAO

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/768 ,  H01L23/535 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/417

CPC classification number: H01L29/0649 ,  H01L21/76895 ,  H01L21/823821 ,  H01L21/823878 ,  H01L23/535 ,  H01L27/0924 ,  H01L29/41791 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: Self-aligned gate edge and local interconnect structures and methods of fabricating self-aligned gate edge and local interconnect structures are described. In an example, a semiconductor structure includes a semiconductor fin disposed above a substrate and having a length in a first direction. A gate structure is disposed over the semiconductor fin, the gate structure having a first end opposite a second end in a second direction, orthogonal to the first direction. A pair of gate edge isolation structures is centered with the semiconductor fin. A first of the pair of gate edge isolation structures is disposed directly adjacent to the first end of the gate structure, and a second of the pair of gate edge isolation structures is disposed directly adjacent to the second end of the gate structure.

Abstract translation: 描述了自对准栅极边缘和局部互连结构以及制造自对准栅极边缘和局部互连结构的方法。 在一个示例中，半导体结构包括设置在基板上方并且具有沿第一方向的长度的半导体鳍片。 栅极结构设置在半导体鳍上方，栅极结构具有与第一方向正交的第二端相对于第二端的第一端。 一对栅极边缘隔离结构以半导体鳍为中心。 一对栅极边缘隔离结构中的第一个直接邻近栅极结构的第一端设置，并且该对栅极边缘隔离结构中的第二个直接邻近栅极结构的第二端设置。