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公开(公告)号:US09784791B2
公开(公告)日:2017-10-10
申请号:US14335066
申请日:2014-07-18
Applicant: Intel Corporation
Inventor: Sankaran M. Menon , Vasudev Bibikar , P. Reddy Sahajananda , Sunghyun Koh , Naveendran Balasingam
IPC: G01R31/317 , G01R31/3177 , G01R31/02 , G01R31/40 , G05F1/10
CPC classification number: G01R31/31725 , G01R31/025 , G01R31/40 , G05F1/10
Abstract: Described is an apparatus which comprises: a first voltage regulator (VR) having a reference input node; and a first multiplexer to provide a reference voltage to the reference input node and operable to select one of at least two different reference voltages as the reference voltage.
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公开(公告)号:US10996283B2
公开(公告)日:2021-05-04
申请号:US15727852
申请日:2017-10-09
Applicant: INTEL CORPORATION
Inventor: Sankaran M. Menon , Vasudev Bibikar , P. Reddy Sahajananda , Sunghyun Koh , Naveendran Balasingam
IPC: G01R31/40 , G01R31/50 , G05F1/10 , G01R31/317
Abstract: Described is an apparatus which comprises: a first voltage regulator (VR) having a reference input node; and a first multiplexer to provide a reference voltage to the reference input node and operable to select one of at least two different reference voltages as the reference voltage.
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公开(公告)号:US11686780B2
公开(公告)日:2023-06-27
申请号:US17232018
申请日:2021-04-15
Applicant: Intel Corporation
Inventor: Sankaran M. Menon , Vasudev Bibikar , P. Reddy Sahajananda , Sunghyun Koh , Naveendran Balasingam
IPC: G01R31/40 , G05F1/10 , G01R31/317
CPC classification number: G01R31/40 , G05F1/10 , G01R31/31725
Abstract: Described is an apparatus which comprises: a first voltage regulator (VR) having a reference input node; and a first multiplexer to provide a reference voltage to the reference input node and operable to select one of at least two different reference voltages as the reference voltage.
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公开(公告)号:US20210231746A1
公开(公告)日:2021-07-29
申请号:US17232018
申请日:2021-04-15
Applicant: Intel Corporation
Inventor: Sankaran M. Menon , Vasudev Bibikar , P. Reddy Sahajananda , Sunghyun Koh , Naveendran Balasingam
Abstract: Described is an apparatus which comprises: a first voltage regulator (VR) having a reference input node; and a first multiplexer to provide a reference voltage to the reference input node and operable to select one of at least two different reference voltages as the reference voltage.
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