公开(公告)号：US20160307796A1

公开(公告)日：2016-10-20

申请号：US15192643

申请日：2016-06-24

Applicant: INTEL CORPORATION

Inventor： Hui Jae Yoo ,  Jeffery D. Bielefeld ,  Sean W. King ,  Sridhar Balakrishnan

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L21/3205

CPC classification number: H01L21/76834 ,  H01L21/2855 ,  H01L21/32053 ,  H01L21/76832 ,  H01L21/76835 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76897 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  Y10S438/927 ,  H01L2924/00

Abstract: Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.