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公开(公告)号：US11495978B2
公开(公告)日：2022-11-08
申请号：US17115643
申请日：2020-12-08
Applicant: Intel Corporation
Inventor： Anil Baby , Anoop Parchuru , Shobhit Chahar , Govindaraj G. , Vinaya Kumar Chandrasekhara
Abstract: In some examples, a system includes a primary side with a charger and a first battery and a secondary side with a second battery. The charger on the primary side can charge both the first battery and the second battery. A hinge resistance is between the primary side and the secondary side. The primary side includes a feedback controlled active device in a current path of the first battery that compensates for the hinge resistance, for connector resistances, or for battery impedances in a current path of the second battery.
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公开(公告)号：US10862316B2
公开(公告)日：2020-12-08
申请号：US16147609
申请日：2018-09-29
Applicant: INTEL CORPORATION
Inventor： Anil Baby , Anoop Parchuru , Shobhit Chahar , Govindaraj G , Vinaya Kumar Chandrasekhara
Abstract: In some examples, a system includes a primary side with a charger and a first battery and a secondary side with a second battery. The charger on the primary side can charge both the first battery and the second battery. A hinge resistance is between the primary side and the secondary side. The primary side includes a feedback controlled active device in a current path of the first battery that compensates for the hinge resistance, for connector resistances, or for battery impedances in a current path of the second battery.
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公开(公告)号：US11099623B2
公开(公告)日：2021-08-24
申请号：US16458024
申请日：2019-06-29
Applicant: Intel Corporation
Inventor： Tarakesava Reddy K , Phani K Alaparthi , Ranganadh K S S , Shobhit Chahar
IPC: G06F13/20 , G06F1/3234 , H02J7/00 , H02J9/00
Abstract: Described are mechanisms and methods to facilitate power saving in Type-C connectors. Some embodiments may comprise an interface to a Configuration Channel (CC) signal path and to a ground signal path of a Universal Serial Bus (USB) Type-C connector port, a first circuitry, and a second circuitry. The first circuitry may be operable to place toggled values on the CC signal path. The second circuitry may be operable to couple the ground signal path to a detection signal path. The placement of the toggled values on the CC signal path is enabled when the detection signal path carries a first value that corresponds with the USB Type-C connector port being connected to a USB Type-C device, and may be disabled when the detection signal path carries a second value that corresponds with the USB Type-C connector port not being connected to a USB Type-C device.
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Patent Agency Ranking
公开(公告)号：US20210167611A1
公开(公告)日：2021-06-03
申请号：US17115643
申请日：2020-12-08
Applicant: Intel Corporation
Inventor： Anil Baby , Anoop Parchuru , Shobhit Chahar , Govindaraj G. , Vinaya Kumar Chandrasekhara
Abstract: In some examples, a system includes a primary side with a charger and a first battery and a secondary side with a second battery. The charger on the primary side can charge both the first battery and the second battery. A hinge resistance is between the primary side and the secondary side. The primary side includes a feedback controlled active device in a current path of the first battery that compensates for the hinge resistance, for connector resistances, or for battery impedances in a current path of the second battery.
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公开(公告)号：US11474589B2
公开(公告)日：2022-10-18
申请号：US17407060
申请日：2021-08-19
Applicant: Intel Corporation
Inventor： Tarakesava Reddy Koki , Phani K Alaparthi , Ranganadh Kss , Shobhit Chahar
IPC: G06F1/3234 , H02J7/00 , H02J9/00
Abstract: Described are mechanisms and methods to facilitate power saving in Type-C connectors. Some embodiments may comprise an interface to a Configuration Channel (CC) signal path and to a ground signal path of a Universal Serial Bus (USB) Type-C connector port, a first circuitry, and a second circuitry. The first circuitry may be operable to place toggled values on the CC signal path. The second circuitry may be operable to couple the ground signal path to a detection signal path. The placement of the toggled values on the CC signal path is enabled when the detection signal path carries a first value that corresponds with the USB Type-C connector port being connected to a USB Type-C device, and may be disabled when the detection signal path carries a second value that corresponds with the USB Type-C connector port not being connected to a USB Type-C device.
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公开(公告)号：US20210382541A1
公开(公告)日：2021-12-09
申请号：US17407060
申请日：2021-08-19
Applicant: Intel Corporation
Inventor： Tarakesava Reddy Koki , Phani K Alaparthi , Ranganadh KSS , Shobhit Chahar
IPC: G06F1/3234 , H02J7/00 , H02J9/00
Abstract: Described are mechanisms and methods to facilitate power saving in Type-C connectors. Some embodiments may comprise an interface to a Configuration Channel (CC) signal path and to a ground signal path of a Universal Serial Bus (USB) Type-C connector port, a first circuitry, and a second circuitry. The first circuitry may be operable to place toggled values on the CC signal path. The second circuitry may be operable to couple the ground signal path to a detection signal path. The placement of the toggled values on the CC signal path is enabled when the detection signal path carries a first value that corresponds with the USB Type-C connector port being connected to a USB Type-C device, and may be disabled when the detection signal path carries a second value that corresponds with the USB Type-C connector port not being connected to a USB Type-C device.
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公开(公告)号：US10747284B2
公开(公告)日：2020-08-18
申请号：US15937603
申请日：2018-03-27
Applicant: Intel Corporation
Inventor： Tarakesava Reddy Koki , Jagadish Vasudeva Singh , Arvind Sundaram , Vinaya Kumar Chandrasekhara , Shobhit Chahar
Abstract: An apparatus is provided which includes: an input/output (I/O) port to be coupled to a device external to the apparatus; a battery having an output node; a voltage regulator to selectively supply power from the I/O port to the battery, to charge the battery; and a switch coupled between the I/O port and the output node, wherein the switch is to selectively allow flow of current from the device to the output node by bypassing the voltage regulator.
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公开(公告)号：US20190305563A1
公开(公告)日：2019-10-03
申请号：US15937603
申请日：2018-03-27
Applicant: Intel Corporation
Inventor： Tarakesava Reddy Koki , Jagadish Vasudeva Singh , Arvind Sundaram , Vinaya Kumar Chandrasekhara , Shobhit Chahar
Abstract: An apparatus is provided which includes: an input/output (I/O) port to be coupled to a device external to the apparatus; a battery having an output node; a voltage regulator to selectively supply power from the I/O port to the battery, to charge the battery; and a switch coupled between the I/O port and the output node, wherein the switch is to selectively allow flow of current from the device to the output node by bypassing the voltage regulator.
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