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    Locking and position status detection scheme for an electronic device
    1.
    发明授权
    Locking and position status detection scheme for an electronic device 有权

    公开(公告)号：US12032415B2

    公开(公告)日：2024-07-09

    申请号：US17033561

    申请日：2020-09-25

    申请人： Intel Corporation

    发明人： Praveen Kashyap Ananta Bhat ,  Tarakesava Reddy Koki ,  Jaison Fernandez ,  Ruchi Sitaram Padekar

    IPC分类号： G06F1/16

    CPC分类号： G06F1/1679 ,  G06F1/1616

    摘要： An example apparatus comprises a first member with a first surface, where the first member is movable relative to a second member with a second surface. The first member comprises a first magnet configured to produce a first magnetic field. The second member comprises a sensor operatively connected to a processor and a second magnet adjacent to the sensor. In a first position, the first magnet and the second magnet are engaged to magnetically hold the first member to the second member such that at least a portion of the first surface of the first member opposes at least a portion of the second surface of the second member. In the first position, the sensor is to detect the first magnetic field produced by the first magnet and is to send a signal to the processor in response to detecting the first magnetic field produced by the first magnet.

    Reduction of skew between positive and negative conductors carrying a differential pair of signals
    4.
    发明授权
    Reduction of skew between positive and negative conductors carrying a differential pair of signals 有权

    公开(公告)号：US11163001B2

    公开(公告)日：2021-11-02

    申请号：US15945169

    申请日：2018-04-04

    申请人： Intel Corporation

    发明人： Tarakesava Reddy Koki ,  Phani Kumar Alaparthi

    IPC分类号： G06K5/04 ,  G11B5/00 ,  G11B20/20 ,  G01R31/317 ,  H03K5/01 ,  H05K1/02 ,  H03K5/00

    摘要： A processor includes a transmitter to transmit, to a receiver, a differential pair of signals including a positive signal transmitted across a positive conductor and a negative signal transmitted across a negative conductor. A first programmable analog delay circuit is coupled to the positive conductor to provide a first delay to the positive signal and a second programmable analog delay circuit is coupled to the negative conductor to provide a second delay to the negative signal. A controller receives data based on a bit error rate (BER) of the differential pair of signals as measured by a bit error checker of the receiver. In response to determining the BER is less than a threshold BER, the controller stores a first delay value to program the first delay and store a second delay value to program the second delay.

    LOCKING AND POSITION STATUS DETECTION SCHEME FOR AN ELECTRONIC DEVICE
    5.
    发明申请
    LOCKING AND POSITION STATUS DETECTION SCHEME FOR AN ELECTRONIC DEVICE 有权

    公开(公告)号：US20210011520A1

    公开(公告)日：2021-01-14

    申请号：US17033561

    申请日：2020-09-25

    申请人： Intel Corporation

    发明人： Praveen Kashyap Ananta Bhat ,  Tarakesava Reddy Koki ,  Jaison Fernandez ,  Ruchi Sitaram Padekar

    IPC分类号： G06F1/16

    摘要： An example apparatus comprises a first member with a first surface, where the first member is movable relative to a second member with a second surface. The first member comprises a first magnet configured to produce a first magnetic field. The second member comprises a sensor operatively connected to a processor and a second magnet adjacent to the sensor. In a first position, the first magnet and the second magnet are engaged to magnetically hold the first member to the second member such that at least a portion of the first surface of the first member opposes at least a portion of the second surface of the second member. In the first position, the sensor is to detect the first magnetic field produced by the first magnet and is to send a signal to the processor in response to detecting the first magnetic field produced by the first magnet.

    REDUCTION OF SKEW BETWEEN POSITIVE AND NEGATIVE CONDUCTORS CARRYING A DIFFERENTIAL PAIR OF SIGNALS
    7.
    发明申请
    REDUCTION OF SKEW BETWEEN POSITIVE AND NEGATIVE CONDUCTORS CARRYING A DIFFERENTIAL PAIR OF SIGNALS 审中-公开

    公开(公告)号：US20190041458A1

    公开(公告)日：2019-02-07

    申请号：US15945169

    申请日：2018-04-04

    申请人： Intel Corporation

    发明人： Tarakesava Reddy Koki ,  Phani Kumar Alaparthi

    IPC分类号： G01R31/317 ,  H03K5/01 ,  H05K1/02

    摘要： A processor includes a transmitter to transmit, to a receiver, a differential pair of signals including a positive signal transmitted across a positive conductor and a negative signal transmitted across a negative conductor. A first programmable analog delay circuit is coupled to the positive conductor to provide a first delay to the positive signal and a second programmable analog delay circuit is coupled to the negative conductor to provide a second delay to the negative signal. A controller receives data based on a bit error rate (BER) of the differential pair of signals as measured by a bit error checker of the receiver. In response to determining the BER is less than a threshold BER, the controller stores a first delay value to program the first delay and store a second delay value to program the second delay.

    DEVICE, METHOD AND SYSTEM FOR PROGRAMMING A POWER SUPPLY TO FACILITATE DYNAMIC PERFORMANCE TUNING
    8.
    发明申请
    DEVICE, METHOD AND SYSTEM FOR PROGRAMMING A POWER SUPPLY TO FACILITATE DYNAMIC PERFORMANCE TUNING 有权

    公开(公告)号：US20220200452A1

    公开(公告)日：2022-06-23

    申请号：US17133442

    申请日：2020-12-23

    申请人： Intel Corporation

    发明人： Tarakesava Reddy Koki ,  Vinaya Kumar Chandrasekhara ,  Aiswarya Pious ,  Nirmala Bailur ,  Jagadish Vasudeva Singh

    IPC分类号： H02M3/158 ,  H02J7/00 ,  H02M1/088

    摘要： Techniques and mechanisms for determining a delivery of power by a programmable power supply. In an embodiment, controller circuitry of a platform receives an indication that a load of the platform is to transition to a particular operational mode. Based on a power requirement of the operational mode, the controller circuitry identifies a mode of voltage regulation which is to be provided with converter circuitry of the platform. The controller circuitry signals that a programmable power supply, which is coupled to the platform, is to output a supply voltage at a level which is based on an amount of power loss associated with the mode of voltage regulation. In another embodiment, the controller circuitry identifies the mode of voltage regulation based on an amount of charge which is currently stored by a battery of the platform.

    DYNAMICALLY RECONFIGURING A DISPLAY IN A MULTI-DISPLAY DEVICE
    10.
    发明申请
    DYNAMICALLY RECONFIGURING A DISPLAY IN A MULTI-DISPLAY DEVICE 有权

    公开(公告)号：US20210149485A1

    公开(公告)日：2021-05-20

    申请号：US17133735

    申请日：2020-12-24

    申请人： Intel Corporation

    发明人： Tarakesava Reddy Koki ,  Praveen Kashyap Ananta Bhat

    IPC分类号： G06F3/01 ,  G06F1/16 ,  G06F3/0354 ,  G06F1/3218 ,  G06F3/041

    摘要： Particular embodiments described herein provide for an electronic device having at least two displays, the electronic device including a first housing, where the first housing includes a primary display having a first display configuration, a second housing, where the second housing includes a secondary display having a second display configuration, a camera to monitor at least one of a head position of a user and eyes of the user, at least one secondary sensor to collect user related data, user tracking logic to determine an intent of the user based on the head position of the user, the eyes of the user, and/or the user related data from the at least one secondary sensor, and display adjustment logic to change the first display configuration and/or the second display configuration when the intent of the user changes.