公开(公告)号：US20180270068A1

公开(公告)日：2018-09-20

申请号：US15459939

申请日：2017-03-15

Applicant: INTEL CORPORATION

Inventor： Eric Innis ,  Raghunandan Makaram ,  TING Lu

IPC: H04L9/32 ,  G06F21/62 ,  H04L9/06 ,  H04L9/08 ,  H04L29/06 ,  H04L9/14 ,  G06F21/64 ,  G06F21/60

CPC classification number: H04L9/3234 ,  G06F21/57 ,  G06F21/602 ,  G06F21/6209 ,  G06F21/64 ,  G06F21/76 ,  H04L9/0631 ,  H04L9/0637 ,  H04L9/0838 ,  H04L9/0841 ,  H04L9/0894 ,  H04L9/14 ,  H04L9/3247 ,  H04L63/0428 ,  H04L63/105 ,  H04L63/123 ,  H04L63/1458 ,  H04L67/10 ,  H04W4/60

Abstract: The present disclosure provides confidential verification for FPGA code. Confidential verification for FPGA code can include receiving the policy from a cloud service provider (CSP) computing device, wherein the policy comprises a plurality of policy requirements used to determine whether to configure the FPGA using the code, receiving the code and the code encryption key from the user computing device, determining whether the code fulfills the plurality of policy requirements, and when the code fulfills the plurality of policy requirements encrypting and integrity protect the code using the code encryption key and providing the encrypted and integrity protected code to an accelerator loader to configure the FPGA using the code.