公开(公告)号：US10955903B2

公开(公告)日：2021-03-23

申请号：US16229447

申请日：2018-12-21

Applicant: INTEL CORPORATION

Inventor： Sudeep Divakaran ,  VNS Murthy Sristi

IPC: G06F1/3234 ,  G06F1/3287 ,  G09G5/37 ,  G06T9/00

Abstract: Disclosed herein are techniques and a display panel that can sequentially display images while the host processor is inactive (e.g., asleep, power gated, or the like). The display panel includes circuitry to receive a set of encoded images, sequentially decode the encoded images provide a bitstream of the decoded images to the display electronics. The host is arranged to encode the images, send the encoded images to a frame buffer at the panel and configure the panel for a low power multi-image presentation mode.