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公开(公告)号:US20190053220A1
公开(公告)日:2019-02-14
申请号:US16076666
申请日:2016-06-29
Applicant: INTEL IP CORPORATION
Inventor: Yushu ZHANG , Yuan ZHU , Wenting CHANG , Sungho MOON , Bishwarup MONDAL
IPC: H04W72/04 , H04W72/12 , H04B7/0417 , H04L5/00 , H04W36/00
CPC classification number: H04W72/0413 , H04B7/0417 , H04B7/0456 , H04B7/0626 , H04B7/063 , H04B7/0695 , H04B17/24 , H04B17/318 , H04L5/0051 , H04W36/0058 , H04W72/1231
Abstract: An apparatus of a user equipment (UE) may include a memory and one or more processors operatively coupled to the memory. The processors may process a scheduling trigger to provide channel state information (CSI) and beam information using extra-large physical uplink shared channel (xPUSCH). The processing device may also generate a reporting message comprising CSI and beam information. The processing device may then encode xPUSCH data to include the reporting message.
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公开(公告)号:US20190089446A1
公开(公告)日:2019-03-21
申请号:US16084505
申请日:2016-07-01
Applicant: INTEL IP CORPORATION
Inventor: Yushu ZHANG , Wenting CHANG , Yuan ZHU , Gang XIONG , Bishwarup MONDAL
Abstract: Technologies described herein provide mechanisms and formats to accomplish the beam switching. In one implementation, least one frame structure for both uplink (UL) and downlink (DL) beam switching is provided. The UL beam switching and refinement may rely on 5G Physical Random Access Channel (xPRACH) or 5G Sounding Reference Signal (xSRS). The DL beam switching and refinement may be done based on a beam refinement reference signal (BRRS). In some embodiments, to accomplish the both UL and DL beam switching and refinement in one subframe, the BRRS and xPRACH or xSRS may be located in one subframe.
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