公开(公告)号：US20210064719A1

公开(公告)日：2021-03-04

申请号：US16559967

申请日：2019-09-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： David WOLPERT ,  Timothy A. SCHELL ,  Michael GRAY ,  Erwin BEHNEN ,  Robert Mahlon AVERILL, III

IPC: G06F17/50

Abstract: Methods, systems and computer program products for avoiding Boolean DRC failures during cell placement are provided. Aspects include generating a semiconductor layout by filling a plurality of rows within a macro block with cells including functional cells and fill cells. Aspects also include modifying the semiconductor layout by removing one or more fill cells from the macro block to create a gap. Aspects also include examining a set of cells that border edges of the gap to identify one or more predicted rule violations. Based on the identified one or more predicted rule violations, aspects also include modifying the semiconductor layout to change a shape of the gap to avoid the one or more predicted rule violations.